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author
lkcl
<lkcl@web>
Tue, 4 Oct 2022 02:33:21 +0000
(
03:33
+0100)
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IkiWiki
<ikiwiki.info>
Tue, 4 Oct 2022 02:33:21 +0000
(
03:33
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openpower/sv/svp64/discussion.mdwn
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diff --git
a/openpower/sv/svp64/discussion.mdwn
b/openpower/sv/svp64/discussion.mdwn
index 700454c195965804d21960a461e9dc65ebe23e89..a5ebcfe863fce45cfbc26c2d77ad0181118c54bb 100644
(file)
--- a/
openpower/sv/svp64/discussion.mdwn
+++ b/
openpower/sv/svp64/discussion.mdwn
@@
-310,12
+310,18
@@
Element-Striding is specifically enabled on RA and RB being
scalar. If VL=1 behaviour is also activated then this is potentially
interfered with, except that, again, RT may be set as a vector destination.
scalar. If VL=1 behaviour is also activated then this is potentially
interfered with, except that, again, RT may be set as a vector destination.
-
```
if svctx.ldstmode == elementstride:
EA = ireg[RA] + ireg[RB]*j # register-strided
```
```
if svctx.ldstmode == elementstride:
EA = ireg[RA] + ireg[RB]*j # register-strided
```
+Vector destination is again "VLSPLAT" mode, but if a Scalar
+destination was set with VL>1, then just as with LD-immediate
+it is the entire predicate mask which must be zero to stop
+the scalar element from being loaded, and the same effect may
+be achieved with VL=1 by ORing all predicate mask bits down to
+a single bit as a new predicate.
+
## answers to 4, loops/uses
### REMAP
## answers to 4, loops/uses
### REMAP
@@
-341,7
+347,7
@@
with nonzeroing the application of a predicate mask to an all-scalar
operation effectively tests **ALL** relevant bits 0..VL-1 as nonzero in the
decision-making, whereas VL=1 will only test the first.
operation effectively tests **ALL** relevant bits 0..VL-1 as nonzero in the
decision-making, whereas VL=1 will only test the first.
-a need for merging all bits into a single alternative predicate mask
+a need for merging
(ORing)
all bits into a single alternative predicate mask
(single-bit) is the sort of thing we can probably live with.
### fast traditional packed SIMD
(single-bit) is the sort of thing we can probably live with.
### fast traditional packed SIMD