# mulli, mullw(o)(u), mulld(o)(u)
with m.Case(MicrOp.OP_MUL_L64):
expected_ov = Signal()
# mulli, mullw(o)(u), mulld(o)(u)
with m.Case(MicrOp.OP_MUL_L64):
expected_ov = Signal()
with m.If(~rec.is_signed):
comb += expected_product.eq(a[0:32] * b[0:32])
comb += Assert(dut.o.o.data[0:64] == expected_product[0:64])
with m.If(~rec.is_signed):
comb += expected_product.eq(a[0:32] * b[0:32])
comb += Assert(dut.o.o.data[0:64] == expected_product[0:64])
with m.Else():
comb += prod.eq(abs32_a[0:64] * abs32_b[0:64])
comb += expected_product.eq(Mux(a[31] ^ b[31], -prod, prod))
with m.Else():
comb += prod.eq(abs32_a[0:64] * abs32_b[0:64])
comb += expected_product.eq(Mux(a[31] ^ b[31], -prod, prod))
comb += Assert(dut.o.xer_ov.data == Repl(expected_ov, 2))
with m.Else(): # is 64-bit
comb += Assert(dut.o.xer_ov.data == Repl(expected_ov, 2))
with m.Else(): # is 64-bit