-Add instructions to convert between integer types.
-
-Add instructions to `swizzle`_ elements in sub-vectors. Note that the sub-vector
-lengths of the source and destination won't necessarily match.
+* Add instructions to convert between integer types.
+* Add instructions to `swizzle`_ elements in sub-vectors. Note that
+ the sub-vector lengths of the source and destination won't necessarily
+ match.
+* Add instructions to transpose (2-4)x(2-4) element matrices.
+* Add instructions to insert or extract a sub-vector from a vector, with
+ the index allowed to be both immediate and from a register (*immediate
+ can be covered by twin-predication, register might be, by virtue of
+ predicates being registers*)
+* Add a register gather instruction (aka MV.X: regfile[rd] =
+ regfile[regfile[rs1]])
+
+subelement swizzle example:
+
+ velswizzle x32, x64, SRCSUBVL=3, DESTSUBVL=4, ELTYPE=u8, elements=[0, 0, 2, 1]