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d7a19d6)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
brw->blorp.upload_shader = brw_blorp_upload_shader;
}
brw->blorp.upload_shader = brw_blorp_upload_shader;
}
-static uint32_t wb_mocs[] = {
- [7] = GEN7_MOCS_L3,
- [8] = BDW_MOCS_WB,
- [9] = SKL_MOCS_WB,
- [10] = CNL_MOCS_WB,
-};
-
-static uint32_t pte_mocs[] = {
- [7] = GEN7_MOCS_L3,
- [8] = BDW_MOCS_PTE,
- [9] = SKL_MOCS_PTE,
- [10] = CNL_MOCS_PTE,
-};
-
static void
blorp_surf_for_miptree(struct brw_context *brw,
struct blorp_surf *surf,
static void
blorp_surf_for_miptree(struct brw_context *brw,
struct blorp_surf *surf,
.buffer = mt->bo,
.offset = mt->offset,
.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
.buffer = mt->bo,
.offset = mt->offset,
.reloc_flags = is_render_target ? EXEC_OBJECT_WRITE : 0,
- .mocs = (is_render_target || mt->bo->external) ? pte_mocs[devinfo->gen] :
- wb_mocs[devinfo->gen],
+ .mocs = brw_get_bo_mocs(devinfo, mt->bo),
};
surf->aux_usage = aux_usage;
};
surf->aux_usage = aux_usage;
/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
#define CNL_MOCS_PTE (1 << 1)
/* TC=LLC/eLLC, LeCC=PTE, LRUM=3, L3CC=WB */
#define CNL_MOCS_PTE (1 << 1)
+uint32_t brw_get_bo_mocs(const struct gen_device_info *devinfo,
+ struct brw_bo *bo);
+
#ifdef __cplusplus
}
#endif
#ifdef __cplusplus
}
#endif
-static uint32_t
-get_tex_mocs(const struct gen_device_info *devinfo, struct brw_bo *bo)
+uint32_t
+brw_get_bo_mocs(const struct gen_device_info *devinfo, struct brw_bo *bo)
{
return (bo && bo->external ? pte_mocs : wb_mocs)[devinfo->gen];
}
{
return (bo && bo->external ? pte_mocs : wb_mocs)[devinfo->gen];
}
struct intel_mipmap_tree *mt,
GLenum target, struct isl_view view,
enum isl_aux_usage aux_usage,
struct intel_mipmap_tree *mt,
GLenum target, struct isl_view view,
enum isl_aux_usage aux_usage,
- uint32_t mocs, uint32_t *surf_offset, int surf_index,
+ uint32_t *surf_offset, int surf_index,
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
uint32_t tile_x = mt->level[0].level_x;
uint32_t tile_y = mt->level[0].level_y;
uint32_t offset = mt->offset;
uint32_t tile_x = mt->level[0].level_x;
uint32_t tile_y = mt->level[0].level_y;
uint32_t offset = mt->offset;
mt->bo, offset, reloc_flags),
.aux_surf = aux_surf, .aux_usage = aux_usage,
.aux_address = aux_offset,
mt->bo, offset, reloc_flags),
.aux_surf = aux_surf, .aux_usage = aux_usage,
.aux_address = aux_offset,
- .mocs = mocs, .clear_color = clear_color,
+ .mocs = brw_get_bo_mocs(devinfo, mt->bo),
+ .clear_color = clear_color,
.x_offset_sa = tile_x, .y_offset_sa = tile_y);
if (aux_surf) {
/* On gen7 and prior, the upper 20 bits of surface state DWORD 6 are the
.x_offset_sa = tile_x, .y_offset_sa = tile_y);
if (aux_surf) {
/* On gen7 and prior, the upper 20 bits of surface state DWORD 6 are the
unsigned unit,
uint32_t surf_index)
{
unsigned unit,
uint32_t surf_index)
{
- const struct gen_device_info *devinfo = &brw->screen->devinfo;
struct gl_context *ctx = &brw->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_mipmap_tree *mt = irb->mt;
struct gl_context *ctx = &brw->ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
struct intel_mipmap_tree *mt = irb->mt;
uint32_t offset;
brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
uint32_t offset;
brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
- pte_mocs[devinfo->gen],
&offset, surf_index,
RELOC_WRITE);
return offset;
&offset, surf_index,
RELOC_WRITE);
return offset;
aux_usage = ISL_AUX_USAGE_NONE;
brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
aux_usage = ISL_AUX_USAGE_NONE;
brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
- get_tex_mocs(devinfo, mt->bo),
surf_offset, surf_index,
0);
}
surf_offset, surf_index,
0);
}
.size = buffer_size,
.format = surface_format,
.stride = pitch,
.size = buffer_size,
.format = surface_format,
.stride = pitch,
- .mocs = get_tex_mocs(devinfo, bo));
+ .mocs = brw_get_bo_mocs(devinfo, bo));
static void
update_renderbuffer_read_surfaces(struct brw_context *brw)
{
static void
update_renderbuffer_read_surfaces(struct brw_context *brw)
{
- const struct gen_device_info *devinfo = &brw->screen->devinfo;
const struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FS_PROG_DATA */
const struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FS_PROG_DATA */
aux_usage = ISL_AUX_USAGE_NONE;
brw_emit_surface_state(brw, irb->mt, target, view, aux_usage,
aux_usage = ISL_AUX_USAGE_NONE;
brw_emit_surface_state(brw, irb->mt, target, view, aux_usage,
- get_tex_mocs(devinfo, irb->mt->bo),
surf_offset, surf_index,
0);
surf_offset, surf_index,
0);
uint32_t *surf_offset,
struct brw_image_param *param)
{
uint32_t *surf_offset,
struct brw_image_param *param)
{
- const struct gen_device_info *devinfo = &brw->screen->devinfo;
-
if (_mesa_is_image_unit_valid(&brw->ctx, u)) {
struct gl_texture_object *obj = u->TexObj;
const unsigned format = get_image_format(brw, u->_ActualFormat, access);
if (_mesa_is_image_unit_valid(&brw->ctx, u)) {
struct gl_texture_object *obj = u->TexObj;
const unsigned format = get_image_format(brw, u->_ActualFormat, access);
view.array_len));
brw_emit_surface_state(brw, mt, mt->target, view,
ISL_AUX_USAGE_NONE,
view.array_len));
brw_emit_surface_state(brw, mt, mt->target, view,
ISL_AUX_USAGE_NONE,
- get_tex_mocs(devinfo, mt->bo),
surf_offset, surf_index,
access == GL_READ_ONLY ? 0 : RELOC_WRITE);
}
surf_offset, surf_index,
access == GL_READ_ONLY ? 0 : RELOC_WRITE);
}