module MUXF7(output O, input I0, I1, S);
assign O = S ? I1 : I0;
endmodule
module MUXF7(output O, input I0, I1, S);
assign O = S ? I1 : I0;
endmodule
module MUXF8(output O, input I0, I1, S);
assign O = S ? I1 : I0;
endmodule
module MUXF8(output O, input I0, I1, S);
assign O = S ? I1 : I0;
endmodule
module CARRY4(output [3:0] CO, O, input CI, CYINIT, input [3:0] DI, S);
assign O = S ^ {CO[2:0], CI | CYINIT};
assign CO[0] = S[0] ? CI | CYINIT : DI[0];
module CARRY4(output [3:0] CO, O, input CI, CYINIT, input [3:0] DI, S);
assign O = S ^ {CO[2:0], CI | CYINIT};
assign CO[0] = S[0] ? CI | CYINIT : DI[0];