+ if (step == 0) {
+ // address goes in S0
+ access_size = (addr % length);
+ if (access_size == 0)
+ access_size = length;
+
+ gs.write_debug_ram(0, ld(S0, 0, (uint16_t) DEBUG_RAM_START + 16));
+ switch (access_size) {
+ case 1:
+ gs.write_debug_ram(1, lb(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+ gs.write_debug_ram(2, sb(S1, S0, 0));
+ gs.write_debug_ram(6, data[0]);
+ break;
+ case 2:
+ gs.write_debug_ram(1, lh(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+ gs.write_debug_ram(2, sh(S1, S0, 0));
+ gs.write_debug_ram(6, data[0] | (data[1] << 8));
+ break;
+ case 4:
+ gs.write_debug_ram(1, lw(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+ gs.write_debug_ram(2, sw(S1, S0, 0));
+ gs.write_debug_ram(6, data[0] | (data[1] << 8) |
+ (data[2] << 16) | (data[3] << 24));
+ break;
+ case 8:
+ gs.write_debug_ram(1, ld(S1, 0, (uint16_t) DEBUG_RAM_START + 24));
+ gs.write_debug_ram(2, sd(S1, S0, 0));
+ gs.write_debug_ram(6, data[0] | (data[1] << 8) |
+ (data[2] << 16) | (data[3] << 24));
+ gs.write_debug_ram(7, data[4] | (data[5] << 8) |
+ (data[6] << 16) | (data[7] << 24));
+ break;
+ default:
+ gs.send_packet("E12");
+ return true;
+ }
+ gs.write_debug_ram(3, jal(0, (uint32_t) (DEBUG_ROM_RESUME - (DEBUG_RAM_START + 4*3))));
+ gs.write_debug_ram(4, addr);
+ gs.write_debug_ram(5, addr >> 32);
+ gs.set_interrupt(0);