+
+ def sv_set_0x80_if_ge(out_v, inp_v, temp_s, compare_rhs):
+ # type: (int, int, int, int) -> list[str]
+ """ generate values with bit 0x80 set if the input vector is
+ unsigned `>= compare_rhs`, this assumes `0x80 <= compare_rhs <= 0xFF`
+ and the input vector elements are in `0 <= v <= 0xFF`.
+
+ can't use CRs for this, since vectors of CRs used as masks currently
+ max out at 4 in the simulator.
+ """
+ assert 0x80 <= compare_rhs <= 0xFF, \
+ "the algorithm only works if compare_rhs is in range"
+ max_arg = compare_rhs - 1
+ add_arg = 0x80 - compare_rhs
+ return [
+ f"addi {temp_s}, 0, {max_arg}",
+ f"sv.maxu *{out_v}, *{inp_v}, {temp_s}",
+ f"sv.addi *{out_v}, *{out_v}, {add_arg}"
+ ]