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author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Wed, 13 Jun 2018 07:45:27 +0000
(08:45 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Wed, 13 Jun 2018 07:45:27 +0000
(08:45 +0100)
simple_v_extension.mdwn
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a/simple_v_extension.mdwn
b/simple_v_extension.mdwn
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simple_v_extension.mdwn
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# Variable-width Variable-packed SIMD / Simple-V / Parallelism Extension Proposal
# Variable-width Variable-packed SIMD / Simple-V / Parallelism Extension Proposal
-* TODO 23may2018: CSR-CAM-ify regfile tables
-* TODO 23may2018: zero-mark predication CSR
-* TODO 28may2018: sort out VSETVL: CSR length to be removed?
-* TODO 09jun2018: Chennai Presentation more up-to-date
-* TODO 09jun2019: elwidth only 4 values (dflt, dflt/2, 8, 16)
-* TODO 09jun2019: extra register banks (future option)
-* TODO 09jun2019: new Reg CSR table (incl. packed=Y/N)
-
-
Key insight: Simple-V is intended as an abstraction layer to provide
a consistent "API" to parallelisation of existing *and future* operations.
*Actual* internal hardware-level parallelism is *not* required, such
Key insight: Simple-V is intended as an abstraction layer to provide
a consistent "API" to parallelisation of existing *and future* operations.
*Actual* internal hardware-level parallelism is *not* required, such