Instead we store a brw_stage_prog_data pointer, and cast it to
brw_wm_prog_data for fragment shader specific code paths.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
struct brw_compile *p;
gl_shader_stage stage;
const struct brw_wm_prog_key *const key;
struct brw_compile *p;
gl_shader_stage stage;
const struct brw_wm_prog_key *const key;
- struct brw_wm_prog_data *prog_data;
+ struct brw_stage_prog_data * const prog_data;
struct gl_shader_program * const shader_prog;
const struct gl_program *prog;
struct gl_shader_program * const shader_prog;
const struct gl_program *prog;
bool debug_flag)
: brw(brw), stage(MESA_SHADER_FRAGMENT), key(key),
bool debug_flag)
: brw(brw), stage(MESA_SHADER_FRAGMENT), key(key),
- prog_data(prog_data), shader_prog(shader_prog), prog(&fp->Base),
- runtime_check_aads_emit(runtime_check_aads_emit),
+ prog_data(&prog_data->base), shader_prog(shader_prog),
+ prog(&fp->Base), runtime_check_aads_emit(runtime_check_aads_emit),
debug_flag(debug_flag), mem_ctx(mem_ctx)
{
ctx = &brw->ctx;
debug_flag(debug_flag), mem_ctx(mem_ctx)
{
ctx = &brw->ctx;
+ assert(stage == MESA_SHADER_FRAGMENT);
+ brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
+
if (brw->gen < 6) {
brw_push_insn_state(p);
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
if (brw->gen < 6) {
brw_push_insn_state(p);
brw_set_default_mask_control(p, BRW_MASK_DISABLE);
gl_fragment_program *fp = (gl_fragment_program *) prog;
struct brw_reg implied_header;
gl_fragment_program *fp = (gl_fragment_program *) prog;
struct brw_reg implied_header;
+ assert(stage == MESA_SHADER_FRAGMENT);
+ brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
+
/* Header is 2 regs, g0 and g1 are the contents. g0 will be implied
* move, here's g1.
*/
/* Header is 2 regs, g0 and g1 are the contents. g0 will be implied
* move, here's g1.
*/
uint32_t base_binding_table_index = (inst->opcode == SHADER_OPCODE_TG4 ||
inst->opcode == SHADER_OPCODE_TG4_OFFSET)
uint32_t base_binding_table_index = (inst->opcode == SHADER_OPCODE_TG4 ||
inst->opcode == SHADER_OPCODE_TG4_OFFSET)
- ? prog_data->base.binding_table.gather_texture_start
- : prog_data->base.binding_table.texture_start;
+ ? prog_data->binding_table.gather_texture_start
+ : prog_data->binding_table.texture_start;
if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
uint32_t sampler = sampler_index.dw1.ud;
if (sampler_index.file == BRW_IMMEDIATE_VALUE) {
uint32_t sampler = sampler_index.dw1.ud;
simd_mode,
return_format);
simd_mode,
return_format);
- brw_mark_surface_used(&prog_data->base, sampler + base_binding_table_index);
+ brw_mark_surface_used(prog_data, sampler + base_binding_table_index);
} else {
/* Non-const sampler index */
/* Note: this clobbers `dst` as a temporary before emitting the send */
} else {
/* Non-const sampler index */
/* Note: this clobbers `dst` as a temporary before emitting the send */
brw_oword_block_read(p, dst, brw_message_reg(inst->base_mrf),
read_offset, surf_index);
brw_oword_block_read(p, dst, brw_message_reg(inst->base_mrf),
read_offset, surf_index);
- brw_mark_surface_used(&prog_data->base, surf_index);
+ brw_mark_surface_used(prog_data, surf_index);
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
0);
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
0);
- brw_mark_surface_used(&prog_data->base, surf_index);
+ brw_mark_surface_used(prog_data, surf_index);
simd_mode,
return_format);
simd_mode,
return_format);
- brw_mark_surface_used(&prog_data->base, surf_index);
+ brw_mark_surface_used(prog_data, surf_index);
- brw_mark_surface_used(&prog_data->base, surf_index);
+ brw_mark_surface_used(prog_data, surf_index);
brw_MOV(p, payload_offset, offset);
brw_MOV(p, payload_value, value);
brw_shader_time_add(p, payload,
brw_MOV(p, payload_offset, offset);
brw_MOV(p, payload_value, value);
brw_shader_time_add(p, payload,
- prog_data->base.binding_table.shader_time_start);
+ prog_data->binding_table.shader_time_start);
- brw_mark_surface_used(&prog_data->base,
- prog_data->base.binding_table.shader_time_start);
+ brw_mark_surface_used(prog_data,
+ prog_data->binding_table.shader_time_start);
atomic_op.dw1.ud, surf_index.dw1.ud,
inst->mlen, dispatch_width / 8);
atomic_op.dw1.ud, surf_index.dw1.ud,
inst->mlen, dispatch_width / 8);
- brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+ brw_mark_surface_used(prog_data, surf_index.dw1.ud);
surf_index.dw1.ud,
inst->mlen, dispatch_width / 8);
surf_index.dw1.ud,
inst->mlen, dispatch_width / 8);
- brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+ brw_mark_surface_used(prog_data, surf_index.dw1.ud);
+ assert(stage == MESA_SHADER_FRAGMENT);
+ brw_wm_prog_data *prog_data = (brw_wm_prog_data*) this->prog_data;
+
/* Save off the start of this SIMD16 program */
prog_data->prog_offset_16 = p->next_insn_offset;
/* Save off the start of this SIMD16 program */
prog_data->prog_offset_16 = p->next_insn_offset;