I've added an additional linker relaxation that relaxes two instruction
pc-relative sequences to one instruction gp relative sequences when
possible. This sequence now optimizes the initial gp generation to
mv gp, gp
which is obviously bogus. The fix is to disable relaxations when
setting up gp, preventing the linker from relaxing away this setup code.
csrw mtvec, t0
# initialize global pointer
csrw mtvec, t0
# initialize global pointer
+.option push
+.option norelax
la tp, _end + 63
and tp, tp, -64
la tp, _end + 63
and tp, tp, -64
csrwi mie, 0
# initialize global pointer
csrwi mie, 0
# initialize global pointer
+.option push
+.option norelax
# initialize stack pointer
la sp, stack_top
# initialize stack pointer
la sp, stack_top