accept an accumulator choice.
* cpux.c,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
{ M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK },
{ M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_LOCK, && case_read_READ_FMT_LOCK },
{ M32RX_XINSN_MACHI_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_MACLO_A, && case_read_READ_FMT_MACHI_A },
- { M32RX_XINSN_MACWHI, && case_read_READ_FMT_MACWHI },
- { M32RX_XINSN_MACWLO, && case_read_READ_FMT_MACWHI },
+ { M32RX_XINSN_MACWHI_A, && case_read_READ_FMT_MACHI_A },
+ { M32RX_XINSN_MACWLO_A, && case_read_READ_FMT_MACHI_A },
{ M32RX_XINSN_MUL, && case_read_READ_FMT_ADD },
{ M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MUL, && case_read_READ_FMT_ADD },
{ M32RX_XINSN_MULHI_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MULLO_A, && case_read_READ_FMT_MULHI_A },
- { M32RX_XINSN_MULWHI, && case_read_READ_FMT_MULWHI },
- { M32RX_XINSN_MULWLO, && case_read_READ_FMT_MULWHI },
+ { M32RX_XINSN_MULWHI_A, && case_read_READ_FMT_MULHI_A },
+ { M32RX_XINSN_MULWLO_A, && case_read_READ_FMT_MULHI_A },
{ M32RX_XINSN_MV, && case_read_READ_FMT_MV },
{ M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A },
{ M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A },
{ M32RX_XINSN_MV, && case_read_READ_FMT_MV },
{ M32RX_XINSN_MVFACHI_A, && case_read_READ_FMT_MVFACHI_A },
{ M32RX_XINSN_MVFACLO_A, && case_read_READ_FMT_MVFACHI_A },
{ M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ },
{ M32RX_XINSN_SADD, && case_read_READ_FMT_SADD },
{ M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 },
{ M32RX_XINSN_PCMPBZ, && case_read_READ_FMT_CMPZ },
{ M32RX_XINSN_SADD, && case_read_READ_FMT_SADD },
{ M32RX_XINSN_MACWU1, && case_read_READ_FMT_MACWU1 },
- { M32RX_XINSN_MSBLO, && case_read_READ_FMT_MACWHI },
+ { M32RX_XINSN_MSBLO, && case_read_READ_FMT_MSBLO },
{ M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 },
{ M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 },
{ M32RX_XINSN_SC, && case_read_READ_FMT_SC },
{ M32RX_XINSN_MULWU1, && case_read_READ_FMT_MULWU1 },
{ M32RX_XINSN_MACLH1, && case_read_READ_FMT_MACWU1 },
{ M32RX_XINSN_SC, && case_read_READ_FMT_SC },
- CASE (read, READ_FMT_MACWHI) : /* e.g. macwhi $src1,$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_macwhi.f
- EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWHI_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (accum) = m32rx_h_accum_get (current_cpu);
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
{
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
CASE (read, READ_FMT_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
{
#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
- CASE (read, READ_FMT_MULWHI) : /* e.g. mulwhi $src1,$src2 */
- {
-#define OPRND(f) par_exec->operands.fmt_mulwhi.f
- EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MULWHI_CODE
- /* Fetch the input operands for the semantic handler. */
- OPRND (src1) = CPU (h_gr[f_r1]);
- OPRND (src2) = CPU (h_gr[f_r2]);
-#undef OPRND
- }
- BREAK (read);
-
CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */
{
#define OPRND(f) par_exec->operands.fmt_mv.f
CASE (read, READ_FMT_MV) : /* e.g. mv $dr,$sr */
{
#define OPRND(f) par_exec->operands.fmt_mv.f
+ CASE (read, READ_FMT_MSBLO) : /* e.g. msblo $src1,$src2 */
+ {
+#define OPRND(f) par_exec->operands.fmt_msblo.f
+ EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_MSBLO_CODE
+ /* Fetch the input operands for the semantic handler. */
+ OPRND (accum) = m32rx_h_accum_get (current_cpu);
+ OPRND (src1) = CPU (h_gr[f_r1]);
+ OPRND (src2) = CPU (h_gr[f_r2]);
+#undef OPRND
+ }
+ BREAK (read);
+
CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
{
#define OPRND(f) par_exec->operands.fmt_mulwu1.f
CASE (read, READ_FMT_MULWU1) : /* e.g. mulwu1 $src1,$src2 */
{
#define OPRND(f) par_exec->operands.fmt_mulwu1.f
-/* macwhi: macwhi $src1,$src2. */
+/* macwhi-a: macwhi $src1,$src2,$acc. */
-SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+SEM_FN_NAME (m32rx,macwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_macwhi.f
+#define OPRND(f) par_exec->operands.fmt_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
- EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWHI_CODE
+ EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_MACHI_A_CODE
- DI opval = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8);
- m32rx_h_accum_set (current_cpu, opval);
- TRACE_RESULT (current_cpu, "accum", 'D', opval);
+ DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))));
+ m32rx_h_accums_set (current_cpu, f_acc, opval);
+ TRACE_RESULT (current_cpu, "acc", 'D', opval);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-/* macwlo: macwlo $src1,$src2. */
+/* macwlo-a: macwlo $src1,$src2,$acc. */
-SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+SEM_FN_NAME (m32rx,macwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_macwhi.f
+#define OPRND(f) par_exec->operands.fmt_machi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
- EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWHI_CODE
+ EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_MACHI_A_CODE
- DI opval = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8);
- m32rx_h_accum_set (current_cpu, opval);
- TRACE_RESULT (current_cpu, "accum", 'D', opval);
+ DI opval = ADDDI (OPRND (acc), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))));
+ m32rx_h_accums_set (current_cpu, f_acc, opval);
+ TRACE_RESULT (current_cpu, "acc", 'D', opval);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-/* mulwhi: mulwhi $src1,$src2. */
+/* mulwhi-a: mulwhi $src1,$src2,$acc. */
-SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+SEM_FN_NAME (m32rx,mulwhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mulwhi.f
+#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
- EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MULWHI_CODE
+ EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_MULHI_A_CODE
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 8), 8);
- m32rx_h_accum_set (current_cpu, opval);
- TRACE_RESULT (current_cpu, "accum", 'D', opval);
+ DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))));
+ m32rx_h_accums_set (current_cpu, f_acc, opval);
+ TRACE_RESULT (current_cpu, "acc", 'D', opval);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
-/* mulwlo: mulwlo $src1,$src2. */
+/* mulwlo-a: mulwlo $src1,$src2,$acc. */
-SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
+SEM_FN_NAME (m32rx,mulwlo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_mulwhi.f
+#define OPRND(f) par_exec->operands.fmt_mulhi_a.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
- EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MULWHI_CODE
+ EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
+ EXTRACT_FMT_MULHI_A_CODE
- DI opval = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 8), 8);
- m32rx_h_accum_set (current_cpu, opval);
- TRACE_RESULT (current_cpu, "accum", 'D', opval);
+ DI opval = MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))));
+ m32rx_h_accums_set (current_cpu, f_acc, opval);
+ TRACE_RESULT (current_cpu, "acc", 'D', opval);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
}
PROFILE_COUNT_INSN (current_cpu, 0, abuf->idesc->num);
SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
{
insn_t insn = SEM_INSN (sem_arg);
-#define OPRND(f) par_exec->operands.fmt_macwhi.f
+#define OPRND(f) par_exec->operands.fmt_msblo.f
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
CIA UNUSED pc = PC;
- EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
- EXTRACT_FMT_MACWHI_CODE
+ EXTRACT_FMT_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
+ EXTRACT_FMT_MSBLO_CODE
{
DI opval = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
{
DI opval = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);