+# RFC ls006 FPR <-> GPR Move/Conversion
+
+**URLs**:
+
+* <https://libre-soc.org/openpower/sv/int_fp_mv/>
+* <https://libre-soc.org/openpower/sv/rfc/ls006.fpintmv/>
+* <https://bugs.libre-soc.org/show_bug.cgi?id=1015>
+* <https://git.openpower.foundation/isa/PowerISA/issues/todo>
+
+**Severity**: Major
+
+**Status**: New
+
+**Date**: 20 Oct 2022
+
+**Target**: v3.2B
+
+**Source**: v3.1B
+
+**Books and Section affected**: **UPDATE**
+
+* Book I 4.6.5 Floating-Point Move Instructions
+* Book I 4.6.7.2 Floating-Point Convert To/From Integer Instructions
+* Appendix E Power ISA sorted by opcode
+* Appendix F Power ISA sorted by version
+* Appendix G Power ISA sorted by Compliancy Subset
+* Appendix H Power ISA sorted by mnemonic
+
+**Summary**
+
+Single-precision Instructions added:
+
+* `fmvtgs` -- Single-Precision Floating Move To GPR
+* `fmvfgs` -- Single-Precision Floating Move From GPR
+* `fcvttgs` -- Single-Precision Floating Convert To Integer In GPR
+* `fcvtfgs` -- Single-Precision Floating Convert From Integer In GPR
+
+Identical (except Double-precision) Instructions added:
+
+* `fmvtg` -- Double-Precision Floating Move To GPR
+* `fmvfg` -- Double-Precision Floating Move From GPR
+* `fcvttg` -- Double-Precision Floating Convert To Integer In GPR
+* `fcvtfg` -- Double-Precision Floating Convert From Integer In GPR
+
+**Submitter**: Luke Leighton (Libre-SOC)
+
+**Requester**: Libre-SOC
+
+**Impact on processor**:
+
+* Addition of four new Single-Precision GPR-FPR-based instructions
+* Addition of four new Double-Precision GPR-FPR-based instructions
+
+**Impact on software**:
+
+* Requires support for new instructions in assembler, debuggers,
+ and related tools.
+
+**Keywords**:
+
+```
+ GPR, FPR, Move, Conversion, JavaScript
+```
+
+**Motivation**
+
+CPUs without VSX/VMX lack a way to efficiently transfer data between
+FPRs and GPRs, they need to go through memory, this proposal adds more
+efficient data transfer (both bitwise copy and Integer <-> FP conversion)
+instructions that transfer directly between FPRs and GPRs without needing
+to go through memory.
+
+IEEE 754 doesn't specify what results are obtained when converting a NaN
+or out-of-range floating-point value to integer, so different programming
+languages and ISAs have made different choices. Below is an overview
+of the different variants, listing the languages and hardware that
+implements each variant.
+
+**Notes and Observations**:
+
+* These instructions are present in many other ISAs.
+* JavaScript rounding as one instruction saves 32 scalar instructions
+ including seven branch instructions.
+* Both sets are orthogonal (no difference except being Single/Double).
+ This allows IBM to follow the pre-existing precedent of allocating
+ separate Major Opcodes (PO) for Double-precision and Single-precision
+ respectively.
+
+**Changes**
+
+Add the following entries to:
+
+* Book I 4.6.5 Floating-Point Move Instructions
+* Book I 4.6.7.2 Floating-Point Convert To/From Integer Instructions
+* Book I 1.6.1 and 1.6.2
+
+----------------
+
+\newpage{}
+
+[[!inline pages="openpower/sv/int_fp_mv/moves_and_conversions" raw=yes ]]
+
+----------
+
+\newpage{}
+
+----------
+
+# Instruction Formats
+
+Add the following entries to Book I 1.6.1.19 XO-FORM:
+
+```
+ |0 |6 |11 |13 |16 |21 |22 |31 |
+ | PO | RT | IT | CVM | FRB | OE | XO | Rc |
+```
+
+Add the following entries to Book I 1.6.1.15 X-FORM:
+
+```
+ |0 |6 |11 |13 |16 |21 |31 |
+ | PO | FRT | IT | // | RB | XO | Rc |
+ | PO | FRT | // | RB | XO | Rc |
+ | PO | RT | // | FRB | XO | Rc |
+```
+
+## Instruction Fields
+
+Add XO to FRB's Formats list in Book I 1.6.2 Word Instruction Fields.
+
+Add XO to FRT's Formats list in Book I 1.6.2 Word Instruction Fields.
+
+Add new fields:
+
+```
+ IT (11:12)
+ Field used to specify integer type for FPR <-> GPR conversions.
+
+ Formats: X, XO
+
+ CVM (13:15)
+ Field used to specify conversion mode for
+ integer -> floating-point conversion.
+
+ Formats: XO
+```
+
+----------
+
+\newpage{}
+
+----------
+
+# Appendices
+
+ Appendix E Power ISA sorted by opcode
+ Appendix F Power ISA sorted by version
+ Appendix G Power ISA sorted by Compliancy Subset
+ Appendix H Power ISA sorted by mnemonic
+
+|Form| Book | Page | Version | mnemonic | Description |
+|----|------|------|---------|----------|-------------|
+|VA | I | # | 3.2B |todo | |
+
+----------------
+
+[[!tag opf_rfc]]