The invalidate_analysis() method knows what analysis passes there are
in the back-end and calls their invalidate() method to report changes
in the IR. For the moment it just calls invalidate_live_intervals()
(which will eventually be fully replaced by this function) if anything
changed.
This makes all optimization passes invalidate DEPENDENCY_EVERYTHING,
which is clearly far from ideal -- The dependency classes passed to
invalidate_analysis() will be refined in a future commit.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4012>
24 files changed:
#include "brw_shader.h"
#include "brw_cfg.h"
#include "brw_shader.h"
#include "brw_cfg.h"
/* Look for and eliminate dead control flow:
*
* - if/endif
/* Look for and eliminate dead control flow:
*
* - if/endif
- s->invalidate_live_intervals();
+ s->invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
delete[] split_points;
delete[] new_virtual_grf;
delete[] split_points;
delete[] new_virtual_grf;
} else {
remap_table[i] = new_index;
alloc.sizes[new_index] = alloc.sizes[i];
} else {
remap_table[i] = new_index;
alloc.sizes[new_index] = alloc.sizes[i];
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+
+ if (progress)
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
* flag and submit a header together with the sampler message as required
* by the hardware.
*/
* flag and submit a header together with the sampler message as required
* by the hardware.
*/
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
for (unsigned i = 0; i < ARRAY_SIZE(delta_xy); i++) {
if (delta_xy[i].file == VGRF && remap[delta_xy[i].nr] != ~0u) {
for (unsigned i = 0; i < ARRAY_SIZE(delta_xy); i++) {
if (delta_xy[i].file == VGRF && remap[delta_xy[i].nr] != ~0u) {
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+ if (progress)
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
inst->header_size = 1;
inst->mlen = 1;
inst->header_size = 1;
inst->mlen = 1;
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
} else {
/* Before register allocation, we didn't tell the scheduler about the
* MRF we use. We know it's safe to use this MRF because nothing
} else {
/* Before register allocation, we didn't tell the scheduler about the
* MRF we use. We know it's safe to use this MRF because nothing
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
void
fs_visitor::calculate_register_pressure()
{
void
fs_visitor::calculate_register_pressure()
{
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
calculate_live_intervals();
unsigned num_instructions = 0;
calculate_live_intervals();
unsigned num_instructions = 0;
+void
+fs_visitor::invalidate_analysis(brw::analysis_dependency_class c)
+{
+ backend_shader::invalidate_analysis(c);
+}
+
void
fs_visitor::optimize()
{
void
fs_visitor::optimize()
{
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
unsigned *out_pull_index);
void lower_constant_loads();
void invalidate_live_intervals();
unsigned *out_pull_index);
void lower_constant_loads();
void invalidate_live_intervals();
+ virtual void invalidate_analysis(brw::analysis_dependency_class c);
void calculate_live_intervals();
void calculate_register_pressure();
void validate();
void calculate_live_intervals();
void calculate_register_pressure();
void validate();
* exists and therefore remove the instruction.
*/
* exists and therefore remove the instruction.
*/
static bool
cmod_propagate_cmp_to_add(const gen_device_info *devinfo, bblock_t *block,
fs_inst *inst)
static bool
cmod_propagate_cmp_to_add(const gen_device_info *devinfo, bblock_t *block,
fs_inst *inst)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
}
ralloc_free(const_ctx);
}
ralloc_free(const_ctx);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
ralloc_free(copy_prop_ctx);
if (progress)
ralloc_free(copy_prop_ctx);
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
* yet in the tail end of this block.
*/
* yet in the tail end of this block.
*/
/**
* Is it safe to eliminate the instruction?
*/
/**
* Is it safe to eliminate the instruction?
*/
ralloc_free(flag_live);
if (progress)
ralloc_free(flag_live);
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
progress |= lower_instruction(this, block, inst);
if (progress)
progress |= lower_instruction(this, block, inst);
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- fs->invalidate_live_intervals();
+ fs->invalidate_analysis(DEPENDENCY_EVERYTHING);
/* Get the chosen virtual registers for each node, and map virtual
* regs in the register classes back down to real hardware reg
/* Get the chosen virtual registers for each node, and map virtual
* regs in the register classes back down to real hardware reg
#include "brw_cfg.h"
#include "brw_fs_live_variables.h"
#include "brw_cfg.h"
#include "brw_fs_live_variables.h"
static bool
is_nop_mov(const fs_inst *inst)
{
static bool
is_nop_mov(const fs_inst *inst)
{
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- s->invalidate_live_intervals();
+ s->invalidate_analysis(DEPENDENCY_EVERYTHING);
cfg->num_blocks, mode);
sched.run(cfg);
cfg->num_blocks, mode);
sched.run(cfg);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
vec4_instruction_scheduler sched(this, prog_data->total_grf);
sched.run(cfg);
vec4_instruction_scheduler sched(this, prog_data->total_grf);
sched.run(cfg);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
cfg = new(mem_ctx) cfg_t(&this->instructions);
}
cfg = new(mem_ctx) cfg_t(&this->instructions);
}
+void
+backend_shader::invalidate_analysis(brw::analysis_dependency_class c)
+{
+ if (c)
+ invalidate_live_intervals();
+}
+
extern "C" const unsigned *
brw_compile_tes(const struct brw_compiler *compiler,
void *log_data,
extern "C" const unsigned *
brw_compile_tes(const struct brw_compiler *compiler,
void *log_data,
#include "compiler/nir/nir.h"
#ifdef __cplusplus
#include "compiler/nir/nir.h"
#ifdef __cplusplus
+#include "brw_ir_analysis.h"
#include "brw_ir_allocator.h"
enum instruction_scheduler_mode {
#include "brw_ir_allocator.h"
enum instruction_scheduler_mode {
void calculate_cfg();
virtual void invalidate_live_intervals() = 0;
void calculate_cfg();
virtual void invalidate_live_intervals() = 0;
+ virtual void invalidate_analysis(brw::analysis_dependency_class c);
};
bool brw_texture_offset(const nir_tex_instr *tex, unsigned src,
};
bool brw_texture_offset(const nir_tex_instr *tex, unsigned src,
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+ if (progress)
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
+void
+vec4_visitor::invalidate_analysis(brw::analysis_dependency_class c)
+{
+ backend_shader::invalidate_analysis(c);
+}
+
bool
vec4_visitor::run()
{
bool
vec4_visitor::run()
{
void pack_uniform_registers();
void calculate_live_intervals();
void invalidate_live_intervals();
void pack_uniform_registers();
void calculate_live_intervals();
void invalidate_live_intervals();
+ virtual void invalidate_analysis(brw::analysis_dependency_class c);
void split_virtual_grfs();
bool opt_vector_float();
bool opt_reduce_swizzle();
void split_virtual_grfs();
bool opt_vector_float();
bool opt_reduce_swizzle();
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
ralloc_free(flag_live);
if (progress)
ralloc_free(flag_live);
if (progress)
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);
- invalidate_live_intervals();
+ invalidate_analysis(DEPENDENCY_EVERYTHING);