+static void
+gen7_emit_buffer_surface_state(struct brw_context *brw,
+ uint32_t *out_offset,
+ drm_intel_bo *bo,
+ unsigned buffer_offset,
+ unsigned surface_format,
+ unsigned buffer_size,
+ unsigned pitch,
+ unsigned mocs)
+{
+ uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
+ 8 * 4, 32, out_offset);
+ memset(surf, 0, 8 * 4);
+
+ surf[0] = BRW_SURFACE_BUFFER << BRW_SURFACE_TYPE_SHIFT |
+ surface_format << BRW_SURFACE_FORMAT_SHIFT |
+ BRW_SURFACE_RC_READ_WRITE;
+ surf[1] = (bo ? bo->offset : 0) + buffer_offset; /* reloc */
+ surf[2] = SET_FIELD((buffer_size - 1) & 0x7f, GEN7_SURFACE_WIDTH) |
+ SET_FIELD(((buffer_size - 1) >> 7) & 0x3fff, GEN7_SURFACE_HEIGHT);
+ surf[3] = SET_FIELD(((buffer_size - 1) >> 21) & 0x3f, BRW_SURFACE_DEPTH) |
+ (pitch - 1);
+
+ surf[5] = SET_FIELD(mocs, GEN7_SURFACE_MOCS);
+
+ /* Emit relocation to surface contents */
+ if (bo) {
+ drm_intel_bo_emit_reloc(brw->batch.bo, *out_offset + 4,
+ bo, buffer_offset, I915_GEM_DOMAIN_SAMPLER, 0);
+ }
+
+ gen7_check_surface_setup(surf, false /* is_render_target */);
+}