Previously we'd use format/etc from the primary (z32) buffer for the
stencil (s8), due to confusion about rsc vs psurf. Rework this to drop
extra arg and push down handling of separate stencil case (and make sure
we take the fmt from the right place).
This doesn't completely fix separate-stencil, but at least it avoids the
GPU scribbling over random other cmdstream buffers and causing a bunch
of bogus fails in dEQP.
Signed-off-by: Rob Clark <robdclark@gmail.com>
struct fd_ringbuffer *ring,
uint32_t base,
struct pipe_surface *psurf,
struct fd_ringbuffer *ring,
uint32_t base,
struct pipe_surface *psurf,
- struct fd_resource *rsc)
{
struct fd_resource_slice *slice;
{
struct fd_resource_slice *slice;
+ struct fd_resource *rsc = fd_resource(psurf->texture);
+ enum pipe_format pfmt = psurf->format;
+ /* separate stencil case: */
+ if (stencil) {
+ rsc = rsc->stencil;
+ pfmt = rsc->base.format;
+ }
+
slice = fd_resource_slice(rsc, psurf->u.tex.level);
offset = fd_resource_offset(rsc, psurf->u.tex.level,
psurf->u.tex.first_layer);
debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
slice = fd_resource_slice(rsc, psurf->u.tex.level);
offset = fd_resource_offset(rsc, psurf->u.tex.level,
psurf->u.tex.first_layer);
debug_assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer);
- enum pipe_format pfmt = psurf->format;
enum a6xx_color_fmt format = fd6_pipe2color(pfmt);
uint32_t stride = slice->pitch * rsc->cpp;
uint32_t size = slice->size0;
enum a6xx_color_fmt format = fd6_pipe2color(pfmt);
uint32_t stride = slice->pitch * rsc->cpp;
uint32_t size = slice->size0;
// TODO: tile mode
// bool tiled;
// tiled = rsc->tile_mode &&
// TODO: tile mode
// bool tiled;
// tiled = rsc->tile_mode &&
- // !fd_resource_level_linear(psurf->texture, psurf->u.tex.level);
+ // !fd_resource_level_linear(&rsc->base, psurf->u.tex.level);
OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 5);
OUT_RING(ring,
OUT_PKT4(ring, REG_A6XX_RB_BLIT_DST_INFO, 5);
OUT_RING(ring,
struct fd_ringbuffer *ring,
uint32_t base,
struct pipe_surface *psurf,
struct fd_ringbuffer *ring,
uint32_t base,
struct pipe_surface *psurf,
- struct fd_resource *rsc,
unsigned buffer)
{
uint32_t info = 0;
unsigned buffer)
{
uint32_t info = 0;
switch (buffer) {
case FD_BUFFER_COLOR:
switch (buffer) {
case FD_BUFFER_COLOR:
break;
case FD_BUFFER_STENCIL:
info |= A6XX_RB_BLIT_INFO_UNK0;
break;
case FD_BUFFER_STENCIL:
info |= A6XX_RB_BLIT_INFO_UNK0;
break;
case FD_BUFFER_DEPTH:
info |= A6XX_RB_BLIT_INFO_DEPTH | A6XX_RB_BLIT_INFO_UNK0;
break;
case FD_BUFFER_DEPTH:
info |= A6XX_RB_BLIT_INFO_DEPTH | A6XX_RB_BLIT_INFO_UNK0;
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
OUT_RING(ring, info | A6XX_RB_BLIT_INFO_GMEM);
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
OUT_RING(ring, info | A6XX_RB_BLIT_INFO_GMEM);
- emit_blit(batch, ring, base, psurf, rsc);
+ emit_blit(batch, ring, base, psurf, stencil);
if (!(batch->restore & (PIPE_CLEAR_COLOR0 << i)))
continue;
emit_restore_blit(batch, ring, gmem->cbuf_base[i], pfb->cbufs[i],
if (!(batch->restore & (PIPE_CLEAR_COLOR0 << i)))
continue;
emit_restore_blit(batch, ring, gmem->cbuf_base[i], pfb->cbufs[i],
- fd_resource(pfb->cbufs[i]->texture),
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
if (!rsc->stencil || (batch->restore & FD_BUFFER_DEPTH)) {
struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
if (!rsc->stencil || (batch->restore & FD_BUFFER_DEPTH)) {
- emit_restore_blit(batch, ring, gmem->zsbuf_base[0], pfb->zsbuf, rsc,
+ emit_restore_blit(batch, ring, gmem->zsbuf_base[0], pfb->zsbuf,
FD_BUFFER_DEPTH);
}
if (rsc->stencil && (batch->restore & FD_BUFFER_STENCIL)) {
FD_BUFFER_DEPTH);
}
if (rsc->stencil && (batch->restore & FD_BUFFER_STENCIL)) {
- emit_restore_blit(batch, ring, gmem->zsbuf_base[1], pfb->zsbuf, rsc->stencil,
+ emit_restore_blit(batch, ring, gmem->zsbuf_base[1], pfb->zsbuf,
struct fd_ringbuffer *ring,
uint32_t base,
struct pipe_surface *psurf,
struct fd_ringbuffer *ring,
uint32_t base,
struct pipe_surface *psurf,
- struct fd_resource *rsc,
unsigned buffer)
{
uint32_t info = 0;
unsigned buffer)
{
uint32_t info = 0;
+ if (!fd_resource(psurf->texture)->valid)
return;
switch (buffer) {
return;
switch (buffer) {
break;
case FD_BUFFER_STENCIL:
info |= A6XX_RB_BLIT_INFO_UNK0;
break;
case FD_BUFFER_STENCIL:
info |= A6XX_RB_BLIT_INFO_UNK0;
break;
case FD_BUFFER_DEPTH:
info |= A6XX_RB_BLIT_INFO_DEPTH;
break;
case FD_BUFFER_DEPTH:
info |= A6XX_RB_BLIT_INFO_DEPTH;
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
OUT_RING(ring, info);
OUT_PKT4(ring, REG_A6XX_RB_BLIT_INFO, 1);
OUT_RING(ring, info);
- emit_blit(batch, ring, base, psurf, rsc);
+ emit_blit(batch, ring, base, psurf, stencil);
if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH)) {
emit_resolve_blit(batch, ring,
if (!rsc->stencil || (batch->resolve & FD_BUFFER_DEPTH)) {
emit_resolve_blit(batch, ring,
- gmem->zsbuf_base[0], pfb->zsbuf, rsc,
+ gmem->zsbuf_base[0], pfb->zsbuf,
FD_BUFFER_DEPTH);
}
if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL)) {
emit_resolve_blit(batch, ring,
FD_BUFFER_DEPTH);
}
if (rsc->stencil && (batch->resolve & FD_BUFFER_STENCIL)) {
emit_resolve_blit(batch, ring,
- gmem->zsbuf_base[1], pfb->zsbuf, rsc->stencil,
+ gmem->zsbuf_base[1], pfb->zsbuf,
if (!(batch->resolve & (PIPE_CLEAR_COLOR0 << i)))
continue;
emit_resolve_blit(batch, ring, gmem->cbuf_base[i], pfb->cbufs[i],
if (!(batch->resolve & (PIPE_CLEAR_COLOR0 << i)))
continue;
emit_resolve_blit(batch, ring, gmem->cbuf_base[i], pfb->cbufs[i],
- fd_resource(pfb->cbufs[i]->texture),