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Fix the access exception during page-table walks to match the original access type...
author
Prashanth Mundkur
<prashanth.mundkur@gmail.com>
Wed, 21 Mar 2018 20:24:51 +0000
(13:24 -0700)
committer
Andrew Waterman
<aswaterman@gmail.com>
Wed, 21 Mar 2018 20:24:51 +0000
(13:24 -0700)
riscv/mmu.cc
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diff --git
a/riscv/mmu.cc
b/riscv/mmu.cc
index eca8a8339968ef6880cba51dd08272b85a2e72a0..e954e5a51d6f322596398f1e0e4e936cecc4de71 100644
(file)
--- a/
riscv/mmu.cc
+++ b/
riscv/mmu.cc
@@
-182,7
+182,7
@@
reg_t mmu_t::walk(reg_t addr, access_type type, reg_t mode)
// check that physical address of PTE is legal
auto ppte = sim->addr_to_mem(base + idx * vm.ptesize);
if (!ppte)
// check that physical address of PTE is legal
auto ppte = sim->addr_to_mem(base + idx * vm.ptesize);
if (!ppte)
-
throw trap_load_access_fault(addr)
;
+
goto fail_access
;
reg_t pte = vm.ptesize == 4 ? *(uint32_t*)ppte : *(uint64_t*)ppte;
reg_t ppn = pte >> PTE_PPN_SHIFT;
reg_t pte = vm.ptesize == 4 ? *(uint32_t*)ppte : *(uint64_t*)ppte;
reg_t ppn = pte >> PTE_PPN_SHIFT;
@@
-223,6
+223,14
@@
fail:
case STORE: throw trap_store_page_fault(addr);
default: abort();
}
case STORE: throw trap_store_page_fault(addr);
default: abort();
}
+
+fail_access:
+ switch (type) {
+ case FETCH: throw trap_instruction_access_fault(addr);
+ case LOAD: throw trap_load_access_fault(addr);
+ case STORE: throw trap_store_access_fault(addr);
+ default: abort();
+ }
}
void mmu_t::register_memtracer(memtracer_t* t)
}
void mmu_t::register_memtracer(memtracer_t* t)