+/**
+****************************************************************************************************
+* CiLib::DepthStencilTileCfgMatch
+*
+* @brief
+* Try to find a tile index for stencil which makes its tile config parameters matches to depth
+* @return
+* TRUE if such tile index for stencil can be found
+****************************************************************************************************
+*/
+BOOL_32 CiLib::DepthStencilTileCfgMatch(
+ const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure
+ ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [out] output structure
+ ) const
+{
+ BOOL_32 depthStencil2DTileConfigMatch = FALSE;
+
+ for (INT_32 stencilTileIndex = MinDepth2DThinIndex;
+ stencilTileIndex <= MaxDepth2DThinIndex;
+ stencilTileIndex++)
+ {
+ ADDR_TILEINFO tileInfo = {0};
+ INT_32 stencilMacroIndex = HwlComputeMacroModeIndex(stencilTileIndex,
+ pIn->flags,
+ 8,
+ pIn->numSamples,
+ &tileInfo);
+
+ if (stencilMacroIndex != TileIndexNoMacroIndex)
+ {
+ if ((m_macroTileTable[stencilMacroIndex].banks ==
+ m_macroTileTable[pOut->macroModeIndex].banks) &&
+ (m_macroTileTable[stencilMacroIndex].bankWidth ==
+ m_macroTileTable[pOut->macroModeIndex].bankWidth) &&
+ (m_macroTileTable[stencilMacroIndex].bankHeight ==
+ m_macroTileTable[pOut->macroModeIndex].bankHeight) &&
+ (m_macroTileTable[stencilMacroIndex].macroAspectRatio ==
+ m_macroTileTable[pOut->macroModeIndex].macroAspectRatio) &&
+ (m_macroTileTable[stencilMacroIndex].pipeConfig ==
+ m_macroTileTable[pOut->macroModeIndex].pipeConfig))
+ {
+ if ((pOut->tcCompatible == FALSE) ||
+ (tileInfo.tileSplitBytes >= MicroTileWidth * MicroTileHeight * pIn->numSamples))
+ {
+ depthStencil2DTileConfigMatch = TRUE;
+ pOut->stencilTileIdx = stencilTileIndex;
+ break;
+ }
+ }
+ }
+ else
+ {
+ ADDR_ASSERT_ALWAYS();
+ }
+ }
+
+ return depthStencil2DTileConfigMatch;
+}
+