radv: add assertions to make sure pipeline layout objects are valid
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Mon, 18 Dec 2017 18:38:53 +0000 (19:38 +0100)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Tue, 19 Dec 2017 20:22:09 +0000 (21:22 +0100)
The spec requires it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_pipeline.c

index fedabcd73f7a6fa5e97ed68ce1eb4706f096e400..3fc21bb501f0ac473be46d8f35db624fab07ce17 100644 (file)
@@ -2023,6 +2023,7 @@ radv_pipeline_init(struct radv_pipeline *pipeline,
 
        pipeline->device = device;
        pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout);
+       assert(pipeline->layout);
 
        radv_pipeline_init_dynamic_state(pipeline, pCreateInfo);
        radv_pipeline_init_blend_state(pipeline, pCreateInfo, extra);
@@ -2370,6 +2371,7 @@ static VkResult radv_compute_pipeline_create(
 
        pipeline->device = device;
        pipeline->layout = radv_pipeline_layout_from_handle(pCreateInfo->layout);
+       assert(pipeline->layout);
 
        pStages[MESA_SHADER_COMPUTE] = &pCreateInfo->stage;
        radv_create_shaders(pipeline, device, cache, (struct radv_pipeline_key) {0}, pStages);