fs_reg *
fs_visitor::emit_samplepos_setup()
{
+ fs_inst *inst;
assert(brw->gen >= 6);
this->current_annotation = "compute sample position";
stride(retype(brw_vec1_grf(payload.sample_pos_reg, 0),
BRW_REGISTER_TYPE_B), 16, 8, 2);
- fs_inst *inst = emit(MOV(int_sample_x, fs_reg(sample_pos_reg)));
- if (dispatch_width == 16) {
+ if (dispatch_width == 8) {
+ emit(MOV(int_sample_x, fs_reg(sample_pos_reg)));
+ } else {
+ inst = emit(MOV(half(int_sample_x, 0), fs_reg(sample_pos_reg)));
inst->force_uncompressed = true;
inst = emit(MOV(half(int_sample_x, 1),
fs_reg(suboffset(sample_pos_reg, 16))));
/* Compute gl_SamplePosition.x */
compute_sample_position(pos, int_sample_x);
pos = offset(pos, 1);
- inst = emit(MOV(int_sample_y, fs_reg(suboffset(sample_pos_reg, 1))));
- if (dispatch_width == 16) {
+ if (dispatch_width == 8) {
+ emit(MOV(int_sample_y, fs_reg(suboffset(sample_pos_reg, 1))));
+ } else {
+ inst = emit(MOV(half(int_sample_y, 0),
+ fs_reg(suboffset(sample_pos_reg, 1))));
inst->force_uncompressed = true;
inst = emit(MOV(half(int_sample_y, 1),
fs_reg(suboffset(sample_pos_reg, 17))));
* Note: this also works if \c reg represents a SIMD16 pair of registers.
*/
static inline fs_reg
-half(const fs_reg ®, unsigned idx)
+half(fs_reg reg, unsigned idx)
{
assert(idx < 2);
assert(idx == 0 || (reg.file != HW_REG && reg.file != IMM));
+ assert(reg.width == 16);
+ reg.width = 8;
return byte_offset(reg, 8 * idx * reg.stride * type_sz(reg.type));
}