soc_core: include information about cpu variant in csv and headers

diff --git a/litex/soc/integration/soc_core.py b/litex/soc/integration/soc_core.py
index 5de233c78920530453904c36d60da43c10db6fd3..1fd7917f1706711ab85c98705937d89703a897ac 100644 (file)
--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@@ -239,6 +239,7 @@ class SoCCore(Module):
 
         # Add CPU
         self.config["CPU_TYPE"] = str(cpu_type).upper()
+        self.config["CPU_VARIANT"] = str(cpu_variant).upper()
         if cpu_type is not None:
             # CPU selection / instance
             if cpu_type == "lm32":