and the OpenPOWER Foundation to be given an IANA-like role in atomically
allocating mode bits.
+Instructions that we need to add, which are a normal part of GPUs,
+include ATAN2, LOG, NORMALISE, YUV2RGB, Khronos Compliance FP mode
+(different from both IEEE754 and "NI" mode), and many more. Many of
+these may turn out to be useful in a wider context: they however need
+to be fully isolated behind "mode-setting".
+
# Summary of Libre-SOC Commercial Project
The Libre-SOC Commercial Product is a hybrid GPU-GPU-VPU intended for
Therefore, to meet our business objectives:
-* A "traditional" general-purpose Vector System (such as that in POWER9)
- is *NOT* an adequate basis for a GPU. Nyuzi's conclusion is that using
- such general-purpose Vector ISAs results in reaching only 25% performance
- (or requiring 4-fold increase in power consumption) to achieve par with
- current commercial-grade GPUs.
+* As shown from Nyuzi and Larrabee, although ideally suited to high
+ performance compute tasks, a "traditional" general-purpose full
+ IEEE754-compliant Vector ISA (such as that in POWER9) is not an adequate
+ basis for a commercially competitive GPU. Nyuzi's conclusion is that
+ using such general-purpose Vector ISAs results in reaching only 25%
+ performance (or requiring 4-fold increase in power consumption) to
+ achieve par with current commercial-grade GPUs.
* We are not going the "traditional" (separate custom GPU) route because
it is not practical for a new team to design hardware and spend 8+
man-years on massively complex inter-processor driver development as well