return ranges
- def interruptCells(self, int_type, int_num, int_flag):
+ def interruptCells(self, int_type, int_num, int_trigger, int_affinity=0):
"""
Interupt cells generation helper:
Following specifications described in
assert len(prop) >= 3
prop[0] = int_type
prop[1] = int_num
- prop[2] = int_flag
+ prop[2] = int_trigger
return prop
def generateDeviceTree(self, state):
node.append(FdtPropertyWords("reg", regs))
# Maintenance interrupt (PPI 25).
node.append(FdtPropertyWords("interrupts",
- self.interruptCells(1, 9, 0xf04)))
+ self.interruptCells(1, 9, 0x4)))
node.appendPhandle(self)
gicv_iidr = Param.UInt32(0,
"VM CPU Interface Identification Register")
- def interruptCells(self, int_type, int_num, int_flag):
+ def interruptCells(self, int_type, int_num, int_trigger, partition=None):
"""
Interupt cells generation helper:
Following specifications described in
Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
"""
assert self._state.interrupt_cells == 3
- return [ int_type, int_num, int_flag ]
+
+ # Check for affinity in case of PPI. If there is no PPI
+ # partitioning, set the affinity to target all CPUs
+ # (affinity = 0xf00)
+ if partition is None and int_type == ArmPPI._LINUX_ID:
+ affinity = 0xf00
+ else:
+ affinity = 0
+
+ return [ int_type, int_num, affinity | int_trigger ]
class ArmInterruptType(ScopedEnum):
"""
cxx_header = "dev/arm/base_gic.hh"
cxx_class = "ArmSPIGen"
+ _LINUX_ID = 0
+
class ArmPPI(ArmInterruptPin):
type = 'ArmPPI'
cxx_header = "dev/arm/base_gic.hh"
cxx_class = "ArmPPIGen"
+ _LINUX_ID = 1
+
class GicV2(BaseGic):
type = 'GicV2'
cxx_header = "dev/arm/gic_v2.hh"
gicv4 = Param.Bool(True, "GICv4 extension available")
- def interruptCells(self, int_type, int_num, int_flag):
+ def interruptCells(self, int_type, int_num, int_trigger, partition=None):
"""
Interupt cells generation helper:
Following specifications described in
assert len(prop) >= 3
prop[0] = int_type
prop[1] = int_num
- prop[2] = int_flag
+ prop[2] = int_trigger
return prop
def generateDeviceTree(self, state):
node.append(FdtPropertyWords("reg", regs))
node.append(FdtPropertyWords("interrupts",
- self.interruptCells(1, int(self.maint_int.num)-16, 0xf04)))
+ self.interruptCells(1, int(self.maint_int.num)-16, 0x4)))
node.appendPhandle(self)