i965: Avoid explicit accumulator operands in SIMD16 mode on Gen7.
authorKenneth Graunke <kenneth@whitecape.org>
Fri, 30 Mar 2012 20:58:06 +0000 (13:58 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Fri, 30 Mar 2012 21:27:54 +0000 (14:27 -0700)
According to the BSpec ISA volume's "Accumulator Register" section:

"[DevIVB] SIMD16 execution on dwords is not allowed when accumulator is
 explicit source or destination operand."

Fixes piglit tests:
- fs-multiply-const-ivec4
- fs-multiply-const-uvec4
- fs-multiply-ivec4-const
- fs-multiply-uvec4-const

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp

index b4ef80b6546877ecf2b8dc2e4830ff8e728aa150..a672ee624b2bab1557d866a28746ed64487dc1e4 100644 (file)
@@ -337,6 +337,9 @@ fs_visitor::visit(ir_expression *ir)
          * FINISHME: Emit just the MUL if we know an operand is small
          * enough.
          */
+        if (intel->gen >= 7 && c->dispatch_width == 16)
+           fail("16-wide explicit accumulator operands unsupported\n");
+
         struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_D);
 
         emit(BRW_OPCODE_MUL, acc, op[0], op[1]);