arm.c (arm_legitimize_reload_address): For NEON quad-word modes, reduce to 9-bit...

2011-04-20  Chung-Lin Tang  <cltang@codesourcery.com>

	* config/arm/arm.c (arm_legitimize_reload_address): For NEON
	quad-word modes, reduce to 9-bit index range when above 1016
	limit.

From-SVN: r172779

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 455bfeb58bc23140d4353f43cd0b92a8c726d446..c70cdb62c2dfff2c2350d20506798a4fed5f134e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2011-04-20  Chung-Lin Tang  <cltang@codesourcery.com>
+
+       * config/arm/arm.c (arm_legitimize_reload_address): For NEON
+       quad-word modes, reduce to 9-bit index range when above 1016
+       limit.
+
 2011-04-20  Andrew Stubbs  <ams@codesourcery.com>
 
        * config/arm/arm.c (arm_gen_constant): Move movw support ....

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 38aa390ab6e4f1c264bbd1bd7369e3358037f7cd..46255cbeebbfc49d0a36cda9452ba2183891f066 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -6330,7 +6330,15 @@ arm_legitimize_reload_address (rtx *p,
        : 0)
 
       if (coproc_p)
-       low = SIGN_MAG_LOW_ADDR_BITS (val, 10);
+       {
+         low = SIGN_MAG_LOW_ADDR_BITS (val, 10);
+
+         /* NEON quad-word load/stores are made of two double-word accesses,
+            so the valid index range is reduced by 8. Treat as 9-bit range if
+            we go over it.  */
+         if (TARGET_NEON && VALID_NEON_QREG_MODE (mode) && low >= 1016)
+           low = SIGN_MAG_LOW_ADDR_BITS (val, 9);
+       }
       else if (GET_MODE_SIZE (mode) == 8)
        {
          if (TARGET_LDRD)