alpha: Use little endian packet accessors.

We know data is little endian, so we can use those accessors
explicitly.

Change-Id: Ieb9c1eb8a4fec31ee69cbbfd8c1afdf9f64de366
Reviewed-on: https://gem5-review.googlesource.com/c/13459
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

diff --git a/src/dev/alpha/backdoor.cc b/src/dev/alpha/backdoor.cc
index e2de1977356b51e35e3ec024025463d42ac6180e..4374f195528ebc28618335a9b24ba644f8cc47dc 100644 (file)
--- a/src/dev/alpha/backdoor.cc
+++ b/src/dev/alpha/backdoor.cc
@@ -120,16 +120,16 @@ AlphaBackdoor::read(PacketPtr pkt)
             switch (daddr)
             {
                 case offsetof(AlphaAccess, last_offset):
-                    pkt->set(alphaAccess->last_offset);
+                    pkt->setLE(alphaAccess->last_offset);
                     break;
                 case offsetof(AlphaAccess, version):
-                    pkt->set(alphaAccess->version);
+                    pkt->setLE(alphaAccess->version);
                     break;
                 case offsetof(AlphaAccess, numCPUs):
-                    pkt->set(alphaAccess->numCPUs);
+                    pkt->setLE(alphaAccess->numCPUs);
                     break;
                 case offsetof(AlphaAccess, intrClockFrequency):
-                    pkt->set(alphaAccess->intrClockFrequency);
+                    pkt->setLE(alphaAccess->intrClockFrequency);
                     break;
                 default:
                     /* Old console code read in everyting as a 32bit int
@@ -138,58 +138,58 @@ AlphaBackdoor::read(PacketPtr pkt)
                   pkt->setBadAddress();
             }
             DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
-                    pkt->get<uint32_t>());
+                    pkt->getLE<uint32_t>());
             break;
         case sizeof(uint64_t):
             switch (daddr)
             {
                 case offsetof(AlphaAccess, inputChar):
-                    pkt->set(terminal->console_in());
+                    pkt->setLE(terminal->console_in());
                     break;
                 case offsetof(AlphaAccess, cpuClock):
-                    pkt->set(alphaAccess->cpuClock);
+                    pkt->setLE(alphaAccess->cpuClock);
                     break;
                 case offsetof(AlphaAccess, mem_size):
-                    pkt->set(alphaAccess->mem_size);
+                    pkt->setLE(alphaAccess->mem_size);
                     break;
                 case offsetof(AlphaAccess, kernStart):
-                    pkt->set(alphaAccess->kernStart);
+                    pkt->setLE(alphaAccess->kernStart);
                     break;
                 case offsetof(AlphaAccess, kernEnd):
-                    pkt->set(alphaAccess->kernEnd);
+                    pkt->setLE(alphaAccess->kernEnd);
                     break;
                 case offsetof(AlphaAccess, entryPoint):
-                    pkt->set(alphaAccess->entryPoint);
+                    pkt->setLE(alphaAccess->entryPoint);
                     break;
                 case offsetof(AlphaAccess, diskUnit):
-                    pkt->set(alphaAccess->diskUnit);
+                    pkt->setLE(alphaAccess->diskUnit);
                     break;
                 case offsetof(AlphaAccess, diskCount):
-                    pkt->set(alphaAccess->diskCount);
+                    pkt->setLE(alphaAccess->diskCount);
                     break;
                 case offsetof(AlphaAccess, diskPAddr):
-                    pkt->set(alphaAccess->diskPAddr);
+                    pkt->setLE(alphaAccess->diskPAddr);
                     break;
                 case offsetof(AlphaAccess, diskBlock):
-                    pkt->set(alphaAccess->diskBlock);
+                    pkt->setLE(alphaAccess->diskBlock);
                     break;
                 case offsetof(AlphaAccess, diskOperation):
-                    pkt->set(alphaAccess->diskOperation);
+                    pkt->setLE(alphaAccess->diskOperation);
                     break;
                 case offsetof(AlphaAccess, outputChar):
-                    pkt->set(alphaAccess->outputChar);
+                    pkt->setLE(alphaAccess->outputChar);
                     break;
                 default:
                     int cpunum = (daddr - offsetof(AlphaAccess, cpuStack)) /
                                  sizeof(alphaAccess->cpuStack[0]);
 
                     if (cpunum >= 0 && cpunum < 64)
-                        pkt->set(alphaAccess->cpuStack[cpunum]);
+                        pkt->setLE(alphaAccess->cpuStack[cpunum]);
                     else
                         panic("Unknown 64bit access, %#x\n", daddr);
             }
             DPRINTF(AlphaBackdoor, "read: offset=%#x val=%#x\n", daddr,
-                    pkt->get<uint64_t>());
+                    pkt->getLE<uint64_t>());
             break;
         default:
           pkt->setBadAddress();
@@ -203,7 +203,7 @@ AlphaBackdoor::write(PacketPtr pkt)
     assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
     Addr daddr = pkt->getAddr() - pioAddr;
 
-    uint64_t val = pkt->get<uint64_t>();
+    uint64_t val = pkt->getLE<uint64_t>();
     assert(pkt->getSize() == sizeof(uint64_t));
 
     switch (daddr) {

diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc
index 7429d8ca9c0260ce69581ac7862caf6d43263abc..5fe5c5fad6cf4b23ab439d992ebb8c4014a36b91 100644 (file)
--- a/src/dev/alpha/tsunami_cchip.cc
+++ b/src/dev/alpha/tsunami_cchip.cc
@@ -87,29 +87,29 @@ TsunamiCChip::read(PacketPtr pkt)
     switch (pkt->getSize()) {
 
       case sizeof(uint64_t):
-          pkt->set<uint64_t>(0);
+          pkt->setLE<uint64_t>(0);
 
           if (daddr & TSDEV_CC_BDIMS)
           {
-              pkt->set(dim[(daddr >> 4) & 0x3F]);
+              pkt->setLE(dim[(daddr >> 4) & 0x3F]);
               break;
           }
 
           if (daddr & TSDEV_CC_BDIRS)
           {
-              pkt->set(dir[(daddr >> 4) & 0x3F]);
+              pkt->setLE(dir[(daddr >> 4) & 0x3F]);
               break;
           }
 
           switch(regnum) {
               case TSDEV_CC_CSR:
-                  pkt->set(0x0);
+                  pkt->setLE(0x0);
                   break;
               case TSDEV_CC_MTR:
                   panic("TSDEV_CC_MTR not implemeted\n");
                    break;
               case TSDEV_CC_MISC:
-                  pkt->set(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) |
+                  pkt->setLE(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) |
                                      (pkt->req->contextId() & 0x3));
                   // currently, FS cannot handle MT so contextId and
                   // cpuId are effectively the same, don't know if it will
@@ -122,34 +122,34 @@ TsunamiCChip::read(PacketPtr pkt)
               case TSDEV_CC_AAR1:
               case TSDEV_CC_AAR2:
               case TSDEV_CC_AAR3:
-                  pkt->set(0);
+                  pkt->setLE(0);
                   break;
               case TSDEV_CC_DIM0:
-                  pkt->set(dim[0]);
+                  pkt->setLE(dim[0]);
                   break;
               case TSDEV_CC_DIM1:
-                  pkt->set(dim[1]);
+                  pkt->setLE(dim[1]);
                   break;
               case TSDEV_CC_DIM2:
-                  pkt->set(dim[2]);
+                  pkt->setLE(dim[2]);
                   break;
               case TSDEV_CC_DIM3:
-                  pkt->set(dim[3]);
+                  pkt->setLE(dim[3]);
                   break;
               case TSDEV_CC_DIR0:
-                  pkt->set(dir[0]);
+                  pkt->setLE(dir[0]);
                   break;
               case TSDEV_CC_DIR1:
-                  pkt->set(dir[1]);
+                  pkt->setLE(dir[1]);
                   break;
               case TSDEV_CC_DIR2:
-                  pkt->set(dir[2]);
+                  pkt->setLE(dir[2]);
                   break;
               case TSDEV_CC_DIR3:
-                  pkt->set(dir[3]);
+                  pkt->setLE(dir[3]);
                   break;
               case TSDEV_CC_DRIR:
-                  pkt->set(drir);
+                  pkt->setLE(drir);
                   break;
               case TSDEV_CC_PRBEN:
                   panic("TSDEV_CC_PRBEN not implemented\n");
@@ -167,10 +167,10 @@ TsunamiCChip::read(PacketPtr pkt)
                   panic("TSDEV_CC_MPRx not implemented\n");
                   break;
               case TSDEV_CC_IPIR:
-                  pkt->set(ipint);
+                  pkt->setLE(ipint);
                   break;
               case TSDEV_CC_ITIR:
-                  pkt->set(itint);
+                  pkt->setLE(itint);
                   break;
               default:
                   panic("default in cchip read reached, accessing 0x%x\n");
@@ -184,7 +184,7 @@ TsunamiCChip::read(PacketPtr pkt)
         panic("invalid access size(?) for tsunami register!\n");
     }
     DPRINTF(Tsunami, "Tsunami CChip: read  regnum=%#x size=%d data=%lld\n",
-            regnum, pkt->getSize(), pkt->get<uint64_t>());
+            regnum, pkt->getSize(), pkt->getLE<uint64_t>());
 
     pkt->makeAtomicResponse();
     return pioDelay;
@@ -200,7 +200,8 @@ TsunamiCChip::write(PacketPtr pkt)
 
     assert(pkt->getSize() == sizeof(uint64_t));
 
-    DPRINTF(Tsunami, "write - addr=%#x value=%#x\n", pkt->getAddr(), pkt->get<uint64_t>());
+    DPRINTF(Tsunami, "write - addr=%#x value=%#x\n",
+            pkt->getAddr(), pkt->getLE<uint64_t>());
 
     bool supportedWrite = false;
 
@@ -215,7 +216,7 @@ TsunamiCChip::write(PacketPtr pkt)
 
         olddim = dim[number];
         olddir = dir[number];
-        dim[number] = pkt->get<uint64_t>();
+        dim[number] = pkt->getLE<uint64_t>();
         dir[number] = dim[number] & drir;
         for (int x = 0; x < Tsunami::Max_CPUs; x++)
         {
@@ -252,7 +253,7 @@ TsunamiCChip::write(PacketPtr pkt)
               panic("TSDEV_CC_MTR write not implemented\n");
           case TSDEV_CC_MISC:
             uint64_t ipreq;
-            ipreq = (pkt->get<uint64_t>() >> 12) & 0xF;
+            ipreq = (pkt->getLE<uint64_t>() >> 12) & 0xF;
             //If it is bit 12-15, this is an IPI post
             if (ipreq) {
                 reqIPI(ipreq);
@@ -261,7 +262,7 @@ TsunamiCChip::write(PacketPtr pkt)
 
             //If it is bit 8-11, this is an IPI clear
             uint64_t ipintr;
-            ipintr = (pkt->get<uint64_t>() >> 8) & 0xF;
+            ipintr = (pkt->getLE<uint64_t>() >> 8) & 0xF;
             if (ipintr) {
                 clearIPI(ipintr);
                 supportedWrite = true;
@@ -269,14 +270,14 @@ TsunamiCChip::write(PacketPtr pkt)
 
             //If it is the 4-7th bit, clear the RTC interrupt
             uint64_t itintr;
-              itintr = (pkt->get<uint64_t>() >> 4) & 0xF;
+              itintr = (pkt->getLE<uint64_t>() >> 4) & 0xF;
             if (itintr) {
                   clearITI(itintr);
                 supportedWrite = true;
             }
 
               // ignore NXMs
-              if (pkt->get<uint64_t>() & 0x10000000)
+              if (pkt->getLE<uint64_t>() & 0x10000000)
                   supportedWrite = true;
 
             if (!supportedWrite)
@@ -308,7 +309,7 @@ TsunamiCChip::write(PacketPtr pkt)
 
                 olddim = dim[number];
                 olddir = dir[number];
-                dim[number] = pkt->get<uint64_t>();
+                dim[number] = pkt->getLE<uint64_t>();
                 dir[number] = dim[number] & drir;
                 for (int x = 0; x < 64; x++)
                 {
@@ -358,13 +359,13 @@ TsunamiCChip::write(PacketPtr pkt)
             case TSDEV_CC_MPR3:
                 panic("TSDEV_CC_MPRx write not implemented\n");
             case TSDEV_CC_IPIR:
-                clearIPI(pkt->get<uint64_t>());
+                clearIPI(pkt->getLE<uint64_t>());
                 break;
             case TSDEV_CC_ITIR:
-                clearITI(pkt->get<uint64_t>());
+                clearITI(pkt->getLE<uint64_t>());
                 break;
             case TSDEV_CC_IPIQ:
-                reqIPI(pkt->get<uint64_t>());
+                reqIPI(pkt->getLE<uint64_t>());
                 break;
             default:
               panic("default in cchip read reached, accessing 0x%x\n");

diff --git a/src/dev/alpha/tsunami_io.cc b/src/dev/alpha/tsunami_io.cc
index 7112a02a7478c03873abc5c0e2bb495eb7ebd92a..339314335f4a111cae72ae90a49ed82efe6cb9b9 100644 (file)
--- a/src/dev/alpha/tsunami_io.cc
+++ b/src/dev/alpha/tsunami_io.cc
@@ -101,45 +101,45 @@ TsunamiIO::read(PacketPtr pkt)
         switch(daddr) {
           // PIC1 mask read
           case TSDEV_PIC1_MASK:
-            pkt->set(~mask1);
+            pkt->setLE(~mask1);
             break;
           case TSDEV_PIC2_MASK:
-            pkt->set(~mask2);
+            pkt->setLE(~mask2);
             break;
           case TSDEV_PIC1_ISR:
               // !!! If this is modified 64bit case needs to be too
               // Pal code has to do a 64 bit physical read because there is
               // no load physical byte instruction
-              pkt->set(picr);
+              pkt->setLE(picr);
               break;
           case TSDEV_PIC2_ISR:
               // PIC2 not implemnted... just return 0
-              pkt->set(0x00);
+              pkt->setLE(0x00);
               break;
           case TSDEV_TMR0_DATA:
-            pkt->set(pitimer.readCounter(0));
+            pkt->setLE(pitimer.readCounter(0));
             break;
           case TSDEV_TMR1_DATA:
-            pkt->set(pitimer.readCounter(1));
+            pkt->setLE(pitimer.readCounter(1));
             break;
           case TSDEV_TMR2_DATA:
-            pkt->set(pitimer.readCounter(2));
+            pkt->setLE(pitimer.readCounter(2));
             break;
           case TSDEV_RTC_DATA:
-            pkt->set(rtc.readData(rtcAddr));
+            pkt->setLE(rtc.readData(rtcAddr));
             break;
           case TSDEV_CTRL_PORTB:
             if (pitimer.outputHigh(2))
-                pkt->set(PORTB_SPKR_HIGH);
+                pkt->setLE(PORTB_SPKR_HIGH);
             else
-                pkt->set(0x00);
+                pkt->setLE(0x00);
             break;
           default:
             panic("I/O Read - va%#x size %d\n", pkt->getAddr(), pkt->getSize());
         }
     } else if (pkt->getSize() == sizeof(uint64_t)) {
         if (daddr == TSDEV_PIC1_ISR)
-            pkt->set<uint64_t>(picr);
+            pkt->setLE<uint64_t>(picr);
         else
            panic("I/O Read - invalid addr - va %#x size %d\n",
                    pkt->getAddr(), pkt->getSize());
@@ -157,13 +157,14 @@ TsunamiIO::write(PacketPtr pkt)
     Addr daddr = pkt->getAddr() - pioAddr;
 
     DPRINTF(Tsunami, "io write - va=%#x size=%d IOPort=%#x Data=%#x\n",
-            pkt->getAddr(), pkt->getSize(), pkt->getAddr() & 0xfff, (uint32_t)pkt->get<uint8_t>());
+            pkt->getAddr(), pkt->getSize(), pkt->getAddr() & 0xfff,
+            (uint32_t)pkt->getLE<uint8_t>());
 
     assert(pkt->getSize() == sizeof(uint8_t));
 
     switch(daddr) {
       case TSDEV_PIC1_MASK:
-        mask1 = ~(pkt->get<uint8_t>());
+        mask1 = ~(pkt->getLE<uint8_t>());
         if ((picr & mask1) && !picInterrupting) {
             picInterrupting = true;
             tsunami->cchip->postDRIR(55);
@@ -176,38 +177,38 @@ TsunamiIO::write(PacketPtr pkt)
         }
         break;
       case TSDEV_PIC2_MASK:
-        mask2 = pkt->get<uint8_t>();
+        mask2 = pkt->getLE<uint8_t>();
         //PIC2 Not implemented to interrupt
         break;
       case TSDEV_PIC1_ACK:
         // clear the interrupt on the PIC
-        picr &= ~(1 << (pkt->get<uint8_t>() & 0xF));
+        picr &= ~(1 << (pkt->getLE<uint8_t>() & 0xF));
         if (!(picr & mask1))
             tsunami->cchip->clearDRIR(55);
         break;
       case TSDEV_DMA1_MODE:
-        mode1 = pkt->get<uint8_t>();
+        mode1 = pkt->getLE<uint8_t>();
         break;
       case TSDEV_DMA2_MODE:
-        mode2 = pkt->get<uint8_t>();
+        mode2 = pkt->getLE<uint8_t>();
         break;
       case TSDEV_TMR0_DATA:
-        pitimer.writeCounter(0, pkt->get<uint8_t>());
+        pitimer.writeCounter(0, pkt->getLE<uint8_t>());
         break;
       case TSDEV_TMR1_DATA:
-        pitimer.writeCounter(1, pkt->get<uint8_t>());
+        pitimer.writeCounter(1, pkt->getLE<uint8_t>());
         break;
       case TSDEV_TMR2_DATA:
-        pitimer.writeCounter(2, pkt->get<uint8_t>());
+        pitimer.writeCounter(2, pkt->getLE<uint8_t>());
         break;
       case TSDEV_TMR_CTRL:
-        pitimer.writeControl(pkt->get<uint8_t>());
+        pitimer.writeControl(pkt->getLE<uint8_t>());
         break;
       case TSDEV_RTC_ADDR:
-        rtcAddr = pkt->get<uint8_t>();
+        rtcAddr = pkt->getLE<uint8_t>();
         break;
       case TSDEV_RTC_DATA:
-        rtc.writeData(rtcAddr, pkt->get<uint8_t>());
+        rtc.writeData(rtcAddr, pkt->getLE<uint8_t>());
         break;
       case TSDEV_KBD:
       case TSDEV_DMA1_CMND:
@@ -222,7 +223,8 @@ TsunamiIO::write(PacketPtr pkt)
       case TSDEV_CTRL_PORTB:
         break;
       default:
-        panic("I/O Write - va%#x size %d data %#x\n", pkt->getAddr(), pkt->getSize(), pkt->get<uint8_t>());
+        panic("I/O Write - va%#x size %d data %#x\n",
+                pkt->getAddr(), pkt->getSize(), pkt->getLE<uint8_t>());
     }
 
     pkt->makeAtomicResponse();

diff --git a/src/dev/alpha/tsunami_pchip.cc b/src/dev/alpha/tsunami_pchip.cc
index 3edb1e71b02717fb8c90a12665d147ea5830827d..d8f9fd1d349a15b8cb28f1a06f854f110a2623fd 100644 (file)
--- a/src/dev/alpha/tsunami_pchip.cc
+++ b/src/dev/alpha/tsunami_pchip.cc
@@ -87,60 +87,60 @@ TsunamiPChip::read(PacketPtr pkt)
 
     switch(daddr) {
       case TSDEV_PC_WSBA0:
-            pkt->set(wsba[0]);
+            pkt->setLE(wsba[0]);
             break;
       case TSDEV_PC_WSBA1:
-            pkt->set(wsba[1]);
+            pkt->setLE(wsba[1]);
             break;
       case TSDEV_PC_WSBA2:
-            pkt->set(wsba[2]);
+            pkt->setLE(wsba[2]);
             break;
       case TSDEV_PC_WSBA3:
-            pkt->set(wsba[3]);
+            pkt->setLE(wsba[3]);
             break;
       case TSDEV_PC_WSM0:
-            pkt->set(wsm[0]);
+            pkt->setLE(wsm[0]);
             break;
       case TSDEV_PC_WSM1:
-            pkt->set(wsm[1]);
+            pkt->setLE(wsm[1]);
             break;
       case TSDEV_PC_WSM2:
-            pkt->set(wsm[2]);
+            pkt->setLE(wsm[2]);
             break;
       case TSDEV_PC_WSM3:
-            pkt->set(wsm[3]);
+            pkt->setLE(wsm[3]);
             break;
       case TSDEV_PC_TBA0:
-            pkt->set(tba[0]);
+            pkt->setLE(tba[0]);
             break;
       case TSDEV_PC_TBA1:
-            pkt->set(tba[1]);
+            pkt->setLE(tba[1]);
             break;
       case TSDEV_PC_TBA2:
-            pkt->set(tba[2]);
+            pkt->setLE(tba[2]);
             break;
       case TSDEV_PC_TBA3:
-            pkt->set(tba[3]);
+            pkt->setLE(tba[3]);
             break;
       case TSDEV_PC_PCTL:
-            pkt->set(pctl);
+            pkt->setLE(pctl);
             break;
       case TSDEV_PC_PLAT:
             panic("PC_PLAT not implemented\n");
       case TSDEV_PC_RES:
             panic("PC_RES not implemented\n");
       case TSDEV_PC_PERROR:
-            pkt->set((uint64_t)0x00);
+            pkt->setLE((uint64_t)0x00);
             break;
       case TSDEV_PC_PERRMASK:
-            pkt->set((uint64_t)0x00);
+            pkt->setLE((uint64_t)0x00);
             break;
       case TSDEV_PC_PERRSET:
             panic("PC_PERRSET not implemented\n");
       case TSDEV_PC_TLBIV:
             panic("PC_TLBIV not implemented\n");
       case TSDEV_PC_TLBIA:
-            pkt->set((uint64_t)0x00); // shouldn't be readable, but linux
+            pkt->setLE((uint64_t)0x00); // shouldn't be readable, but linux
             break;
       case TSDEV_PC_PMONCTL:
             panic("PC_PMONCTL not implemented\n");
@@ -171,43 +171,43 @@ TsunamiPChip::write(PacketPtr pkt)
 
     switch(daddr) {
         case TSDEV_PC_WSBA0:
-              wsba[0] = pkt->get<uint64_t>();
+              wsba[0] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_WSBA1:
-              wsba[1] = pkt->get<uint64_t>();
+              wsba[1] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_WSBA2:
-              wsba[2] = pkt->get<uint64_t>();
+              wsba[2] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_WSBA3:
-              wsba[3] = pkt->get<uint64_t>();
+              wsba[3] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_WSM0:
-              wsm[0] = pkt->get<uint64_t>();
+              wsm[0] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_WSM1:
-              wsm[1] = pkt->get<uint64_t>();
+              wsm[1] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_WSM2:
-              wsm[2] = pkt->get<uint64_t>();
+              wsm[2] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_WSM3:
-              wsm[3] = pkt->get<uint64_t>();
+              wsm[3] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_TBA0:
-              tba[0] = pkt->get<uint64_t>();
+              tba[0] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_TBA1:
-              tba[1] = pkt->get<uint64_t>();
+              tba[1] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_TBA2:
-              tba[2] = pkt->get<uint64_t>();
+              tba[2] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_TBA3:
-              tba[3] = pkt->get<uint64_t>();
+              tba[3] = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_PCTL:
-              pctl = pkt->get<uint64_t>();
+              pctl = pkt->getLE<uint64_t>();
               break;
         case TSDEV_PC_PLAT:
               panic("PC_PLAT not implemented\n");