r600g: fix all failing depth-stencil tests for evergreen

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index a66387b2aeb26ae44989154b86c47c25d4167208..0d2fa3045a44768afd343f38ccf0e75f8359f405 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1664,7 +1664,7 @@ static void evergreen_db(struct r600_context *rctx, struct r600_pipe_state *rsta
                                                offset, &rtex->resource,
                                                RADEON_USAGE_READWRITE);
                        r600_pipe_state_add_reg_bo(rstate, R_028044_DB_STENCIL_INFO,
-                                               0, NULL, RADEON_USAGE_READWRITE);
+                                               1, NULL, RADEON_USAGE_READWRITE);
                }
        }
 

diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h
index a7570c7deecd968272f789477527709a6471bd10..0046ce78b8376235c61dfad3e6bf39d8421ad8af 100644 (file)
--- a/src/gallium/drivers/r600/r600_resource.h
+++ b/src/gallium/drivers/r600/r600_resource.h
@@ -26,7 +26,8 @@
 #include "r600.h"
 
 /* flag to indicate a resource is to be used as a transfer so should not be tiled */
-#define R600_RESOURCE_FLAG_TRANSFER     PIPE_RESOURCE_FLAG_DRV_PRIV
+#define R600_RESOURCE_FLAG_TRANSFER            PIPE_RESOURCE_FLAG_DRV_PRIV
+#define R600_RESOURCE_FLAG_FLUSHED_DEPTH       (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
 
 struct r600_transfer {
        struct pipe_transfer            transfer;

diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index d16c25294d79d142f43afba8090a68c260b4aa32..cbb9e5a9f48bef70ac6ff8cd7d82c177d2b6d351 100644 (file)
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -234,8 +234,16 @@ static void r600_texture_set_array_mode(struct pipe_screen *screen,
 
 static int r600_init_surface(struct radeon_surface *surface,
                             const struct pipe_resource *ptex,
-                            unsigned array_mode, bool is_transfer)
+                            unsigned array_mode,
+                            bool is_transfer, bool is_flushed_depth)
 {
+       const struct util_format_description *desc =
+               util_format_description(ptex->format);
+       bool is_depth, is_stencil;
+
+       is_depth = util_format_has_depth(desc);
+       is_stencil = util_format_has_stencil(desc);
+
        surface->npix_x = ptex->width0;
        surface->npix_y = ptex->height0;
        surface->npix_z = ptex->depth0;
@@ -295,12 +303,14 @@ static int r600_init_surface(struct radeon_surface *surface,
        if (ptex->bind & PIPE_BIND_SCANOUT) {
                surface->flags |= RADEON_SURF_SCANOUT;
        }
-       if ((ptex->bind & PIPE_BIND_DEPTH_STENCIL) &&
-                       util_format_is_depth_and_stencil(ptex->format) && !is_transfer) {
+
+       if (!is_transfer && !is_flushed_depth && is_depth) {
                surface->flags |= RADEON_SURF_ZBUFFER;
-               surface->flags |= RADEON_SURF_SBUFFER;
-       }
 
+               if (is_stencil) {
+                       surface->flags |= RADEON_SURF_SBUFFER;
+               }
+       }
        return 0;
 }
 
@@ -638,7 +648,8 @@ struct pipe_resource *r600_texture_create(struct pipe_screen *screen,
        }
 
        r = r600_init_surface(&surface, templ, array_mode,
-                             templ->flags & R600_RESOURCE_FLAG_TRANSFER);
+                             templ->flags & R600_RESOURCE_FLAG_TRANSFER,
+                             templ->flags & R600_RESOURCE_FLAG_FLUSHED_DEPTH);
        if (r) {
                return NULL;
        }
@@ -719,7 +730,7 @@ struct pipe_resource *r600_texture_from_handle(struct pipe_screen *screen,
        else
                array_mode = 0;
 
-       r = r600_init_surface(&surface, templ, array_mode, 0);
+       r = r600_init_surface(&surface, templ, array_mode, false, false);
        if (r) {
                return NULL;
        }
@@ -749,7 +760,7 @@ void r600_init_flushed_depth_texture(struct pipe_context *ctx,
        resource.nr_samples = texture->nr_samples;
        resource.usage = staging ? PIPE_USAGE_DYNAMIC : PIPE_USAGE_DEFAULT;
        resource.bind = texture->bind & ~PIPE_BIND_DEPTH_STENCIL;
-       resource.flags = texture->flags;
+       resource.flags = texture->flags | R600_RESOURCE_FLAG_FLUSHED_DEPTH;
 
        if (staging)
                resource.flags |= R600_RESOURCE_FLAG_TRANSFER;