(INITIALIZE_TRAMPOLINE): Likewise for cacheflush.

From-SVN: r10812

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 83b10a2e486a949b7b50d53c8cfa1d2a60d2d667..a6a469f712f8501bd537f5fae91226ad39f9b9cf 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -2162,12 +2162,11 @@ typedef struct mips_args {
     }                                                                      \
                                                                            \
   /* Flush the instruction cache.  */                                      \
-  /* ??? Are the modes right? Maybe they should depend on -mint64/-mlong64? */\
   /* ??? Should check the return value for errors.  */                     \
   emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"),                    \
                     0, VOIDmode, 3, addr, Pmode,                           \
-                    GEN_INT (TRAMPOLINE_SIZE), SImode,                     \
-                    GEN_INT (1), SImode);                                  \
+                    GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
+                    GEN_INT (1), TYPE_MODE (integer_type_node));           \
 }
 \f
 /* Addressing modes, and classification of registers for them.  */