Separate the new FP16 instructions backported from Armv8.4-a to Armv8.2-a into a...
authorTamar Christina <tamar.christina@arm.com>
Wed, 15 Nov 2017 15:56:23 +0000 (15:56 +0000)
committerTamar Christina <tamar.christina@arm.com>
Wed, 15 Nov 2017 15:56:23 +0000 (15:56 +0000)
The new flag "+fp16fml" is available from Armv8.2-a and implies +fp16 and is mandatory
from Armv8.4-a.

gas/

* config/tc-arm.c (arm_ext_fp16_fml, fp16fml): New.
(do_neon_fmac_maybe_scalar_long): Use arm_ext_fp16_fml.
* doc/c-arm.texi (fp16, fp16fml): New.
* testsuite/gas/arm/armv8_2-a-fp16.d (fp16): Make fp16fml.
* testsuite/gas/arm/armv8_3-a-fp16.d (fp16): Make fp16fml.
* testsuite/gas/arm/armv8_2-a-fp16-illegal.d (fp16): Make fp16fml.
* testsuite/gas/arm/armv8_2-a-fp16-thumb2.d (fp16): Make fp16fml.

include/

* opcode/arm.h: (ARM_EXT2_FP16_FML): New.
(ARM_AEXT2_V8_4A): Add ARM_EXT2_FP16_FML.

gas/ChangeLog
gas/config/tc-arm.c
gas/doc/c-arm.texi
gas/testsuite/gas/arm/armv8_2-a-fp16-illegal.d
gas/testsuite/gas/arm/armv8_2-a-fp16-thumb2.d
gas/testsuite/gas/arm/armv8_2-a-fp16.d
gas/testsuite/gas/arm/armv8_3-a-fp16.d
include/ChangeLog
include/opcode/arm.h

index 8ebdb8b470d05a146711385ceb6bbb3cc41add5d..307fb00f2927b7bc2b9a40c3549af38917f31efd 100644 (file)
@@ -1,3 +1,13 @@
+2017-11-15  Tamar Christina  <tamar.christina@arm.com>
+
+       * config/tc-arm.c (arm_ext_fp16_fml, fp16fml): New.
+       (do_neon_fmac_maybe_scalar_long): Use arm_ext_fp16_fml.
+       * doc/c-arm.texi (fp16, fp16fml): New.
+       * testsuite/gas/arm/armv8_2-a-fp16.d (fp16): Make fp16fml.
+       * testsuite/gas/arm/armv8_3-a-fp16.d (fp16): Make fp16fml.
+       * testsuite/gas/arm/armv8_2-a-fp16-illegal.d (fp16): Make fp16fml.
+       * testsuite/gas/arm/armv8_2-a-fp16-thumb2.d (fp16): Make fp16fml.
+
 2017-11-15  Nick Clifton  <nickc@redhat.com>
 
        PR 15152
index 128ab38db69b81ac75a3a43d103c3bfce8ae82c1..e920637c8090b1446831d5416454d667d24e3b97 100644 (file)
@@ -235,6 +235,8 @@ static const arm_feature_set arm_ext_ras =
 /* FP16 instructions.  */
 static const arm_feature_set arm_ext_fp16 =
   ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST);
+static const arm_feature_set arm_ext_fp16_fml =
+  ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_FML);
 static const arm_feature_set arm_ext_v8_2 =
   ARM_FEATURE_CORE_HIGH (ARM_EXT2_V8_2A);
 static const arm_feature_set arm_ext_v8_3 =
@@ -16210,7 +16212,7 @@ do_neon_fmac_maybe_scalar_long (int subtype)
     as_warn (_("vfmal/vfmsl with FP16 type cannot be conditional, the "
               "behaviour is UNPREDICTABLE"));
 
-  constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_fp16),
+  constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_fp16_fml),
              _(BAD_FP16));
 
   constraint (!ARM_CPU_HAS_FEATURE (cpu_variant, fpu_neon_ext_armv8),
@@ -26243,6 +26245,11 @@ static const struct arm_option_extension_value_table arm_extensions[] =
   ARM_EXT_OPT ("fp16",  ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
                        ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST),
                        ARM_ARCH_V8_2A),
+  ARM_EXT_OPT ("fp16fml",  ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
+                                                 | ARM_EXT2_FP16_FML),
+                          ARM_FEATURE_CORE_HIGH (ARM_EXT2_FP16_INST
+                                                 | ARM_EXT2_FP16_FML),
+                          ARM_ARCH_V8_2A),
   ARM_EXT_OPT2 ("idiv",        ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV | ARM_EXT_DIV),
                        ARM_FEATURE_CORE_LOW (ARM_EXT_ADIV | ARM_EXT_DIV),
                        ARM_FEATURE_CORE_LOW (ARM_EXT_V7A),
index 5e518c69fed6d9750ad13462e89ef2ca34614fc7..075716f1f2327f8a31366e9ef0d1c360efb020d6 100644 (file)
@@ -178,6 +178,8 @@ The following extensions are currently supported:
 @code{crypto} (Cryptography Extensions for v8-A architecture, implies @code{fp+simd}),
 @code{dotprod} (Dot Product Extensions for v8.2-A architecture, implies @code{fp+simd}),
 @code{fp} (Floating Point Extensions for v8-A architecture),
+@code{fp16} (FP16 Extensions for v8.2-A architecture, implies @code{fp}),
+@code{fp16fml} (FP16 Floating Point Multiplication Variant Extensions for v8.2-A architecture, implies @code{fp16}),
 @code{idiv} (Integer Divide Extensions for v7-A and v7-R architectures),
 @code{iwmmxt},
 @code{iwmmxt2},
index 745ae052bcad9d5ab41794441085dceb60419042..b5680874a4b05ab2915b10497da911e0214f3beb 100644 (file)
@@ -1,2 +1,2 @@
-#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
+#as: -march=armv8.2-a+fp16fml -mfpu=neon-fp-armv8
 #error-output: armv8_2-a-fp16-illegal.l
index b03a8ae01222e0519c80e72f6417b1f99a066629..010eda7dbb8eb7c8db6b018baafa751935afded9 100644 (file)
@@ -1,4 +1,4 @@
-#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8 -mthumb
+#as: -march=armv8.2-a+fp16fml -mfpu=neon-fp-armv8 -mthumb
 #source: armv8_2-a-fp16.s
 #objdump: -d
 
index 9f99828d02ed2b4020a52f62922bf446cbd32dad..e6392537d4ce350a43121c57af3cac005ff99a08 100644 (file)
@@ -1,4 +1,4 @@
-#as: -march=armv8.2-a+fp16 -mfpu=neon-fp-armv8
+#as: -march=armv8.2-a+fp16fml -mfpu=neon-fp-armv8
 #source: armv8_2-a-fp16.s
 #objdump: -d
 
index 545275a82ade99142922a3bda7cf43f9629c54aa..70d693084c18f6ae2a0bad4bbeda7c0129cfb3ba 100644 (file)
@@ -1,4 +1,4 @@
-#as: -march=armv8.3-a+fp16 -mfpu=neon-fp-armv8
+#as: -march=armv8.3-a+fp16fml -mfpu=neon-fp-armv8
 #source: armv8_2-a-fp16.s
 #objdump: -d
 
index a6e3ebcb973bdd4ffe6d72dc76663981edfd92b3..79b6eeb7738a86e4792c4b731e4b1a6b4d5024a6 100644 (file)
@@ -1,3 +1,8 @@
+2017-11-15  Tamar Christina  <tamar.christina@arm.com>
+
+       * opcode/arm.h: (ARM_EXT2_FP16_FML): New.
+       (ARM_AEXT2_V8_4A): Add ARM_EXT2_FP16_FML.
+
 2017-11-13  Jan Beulich  <jbeulich@suse.com>
 
        * coff/pe.h (COFF_ENCODE_ALIGNMENT): Cap value to maximum one
index 932bf630f07741ed02912a912472ccd01b51e7c6..a15e5d613e398a05b00c965da9ff510a0439c8bd 100644 (file)
@@ -67,6 +67,7 @@
 #define ARM_EXT2_V8_3A  0x00000100     /* ARM V8.3A.  */
 #define ARM_EXT2_V8A    0x00000200     /* ARMv8-A.  */
 #define ARM_EXT2_V8_4A  0x00000400     /* ARM V8.4A.  */
+#define ARM_EXT2_FP16_FML 0x00000800   /* ARM V8.2A FP16-FML instructions.  */
 
 /* Co-processor space extensions.  */
 #define ARM_CEXT_XSCALE   0x00000001   /* Allow MIA etc.          */
 #define ARM_AEXT2_V8_1A        (ARM_AEXT2_V8A | ARM_EXT2_PAN)
 #define ARM_AEXT2_V8_2A        (ARM_AEXT2_V8_1A | ARM_EXT2_V8_2A | ARM_EXT2_RAS)
 #define ARM_AEXT2_V8_3A        (ARM_AEXT2_V8_2A | ARM_EXT2_V8_3A)
-#define ARM_AEXT2_V8_4A        (ARM_AEXT2_V8_3A | ARM_EXT2_V8_4A)
+#define ARM_AEXT2_V8_4A        (ARM_AEXT2_V8_3A | ARM_EXT2_FP16_FML | ARM_EXT2_V8_4A)
 #define ARM_AEXT_V8M_BASE (ARM_AEXT_V6SM | ARM_EXT_DIV)
 #define ARM_AEXT_V8M_MAIN ARM_AEXT_V7M
 #define ARM_AEXT_V8M_MAIN_DSP ARM_AEXT_V7EM