amdgcn: Split 64-bit constant loads post-reload
authorAndrew Stubbs <ams@codesourcery.com>
Thu, 19 Mar 2020 17:43:12 +0000 (17:43 +0000)
committerAndrew Stubbs <ams@codesourcery.com>
Fri, 24 Apr 2020 15:55:12 +0000 (16:55 +0100)
This helps avoid spilling 64-bit constant loads to stack by simplifying the
code that LRA sees.

2020-04-24  Andrew Stubbs  <ams@codesourcery.com>

gcc/
* config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.

gcc/ChangeLog
gcc/config/gcn/gcn.md

index d402ae643d332c8fad66bbd7c524a3c3f2b30cb7..2db3413a9731f574d9ffdb819babb54067ec016a 100644 (file)
@@ -1,3 +1,7 @@
+2020-04-24  Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
+
 2020-04-24  Richard Sandiford  <richard.sandiford@arm.com>
 
        * config/aarch64/arm_sve.h: Add a comment.
index 702ba55c11a2d31f4e40cce5977872bde2e4272e..8f5937781b2b6bfa1af92d5809bc5b8111b999a8 100644 (file)
   ds_read_b64\t%0, %A1%O1\;s_waitcnt\tlgkmcnt(0)
   global_load_dwordx2\t%0, %A1%O1%g1\;s_waitcnt\tvmcnt(0)
   global_store_dwordx2\t%A0, %1%O0%g0"
-  "(reload_completed && !MEM_P (operands[0]) && !MEM_P (operands[1])
-    && !gcn_sgpr_move_p (operands[0], operands[1]))
-   || (GET_CODE (operands[1]) == CONST_INT && !gcn_constant64_p (operands[1]))"
+  "reload_completed
+   && ((!MEM_P (operands[0]) && !MEM_P (operands[1])
+        && !gcn_sgpr_move_p (operands[0], operands[1]))
+       || (GET_CODE (operands[1]) == CONST_INT
+          && !gcn_constant64_p (operands[1])))"
   [(set (match_dup 0) (match_dup 1))
    (set (match_dup 2) (match_dup 3))]
   {