"NUM_CULLDIST_ENABLED",
"FS_EARLY_DEPTH_STENCIL",
"NEXT_SHADER",
+ "CS_FIXED_BLOCK_WIDTH",
+ "CS_FIXED_BLOCK_HEIGHT",
+ "CS_FIXED_BLOCK_DEPTH"
};
const char *tgsi_return_type_names[TGSI_RETURN_TYPE_COUNT] =
is bound. This is only a hint to the driver and doesn't have to be precise.
Only set for VS and TES.
+TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH / HEIGHT / DEPTH
+"""""""""""""""""""""""""""""""""""""""""""""""""""
+
+Threads per block in each dimension, if known at compile time. If the block size
+is known all three should be at least 1. If it is unknown they should all be set
+to 0 or not set.
Texture Sampling and Texture Formats
------------------------------------
#define TGSI_PROPERTY_NUM_CULLDIST_ENABLED 16
#define TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL 17
#define TGSI_PROPERTY_NEXT_SHADER 18
-#define TGSI_PROPERTY_COUNT 19
+#define TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH 19
+#define TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT 20
+#define TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH 21
+#define TGSI_PROPERTY_COUNT 22
struct tgsi_property {
unsigned Type : 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
return false;
}
+static void
+emit_compute_block_size(const struct gl_program *program,
+ struct ureg_program *ureg) {
+ const struct gl_compute_program *cp =
+ (const struct gl_compute_program *)program;
+
+ ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH,
+ cp->LocalSize[0]);
+ ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT,
+ cp->LocalSize[1]);
+ ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH,
+ cp->LocalSize[2]);
+}
+
/**
* Translate intermediate IR (glsl_to_tgsi_instruction) to TGSI format.
* \param program the program to translate
}
}
+ if (procType == TGSI_PROCESSOR_COMPUTE) {
+ emit_compute_block_size(proginfo, ureg);
+ }
+
/* Declare address register.
*/
if (program->num_address_regs > 0) {