update page links

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index c30776ef32544e534c19b2a63ecc04e52a6d7372..5e34b681ff8d47e9b6080edcbd433a0018ad07c7 100644 (file)
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -110,7 +110,7 @@ mode is encoded in XO and is 4 bits
     If Rc:
         CR0 = analyse(RT)
 
-When used with SVP64 Prefixing this is a [[openpower/sv/normal]]
+When used with SVP64 Prefixing this is a [[sv/normal]]
 SVP64 type operation and as such can use Rc=1 and RC1 Data-dependent
 Mode capability
 
@@ -134,7 +134,7 @@ mode is encoded in XO and is 4 bits
     If Rc:
         CR0 = analyse(RT)
 
-When used with SVP64 Prefixing this is a [[openpower/sv/normal]]
+When used with SVP64 Prefixing this is a [[sv/normal]]
 SVP64 type operation and as such can use Rc=1 and RC1 Data-dependent
 Mode capability.
 
@@ -158,7 +158,7 @@ mode is encoded in XO and is 4 bits
         result |= CR{BF} & ~mask
     CR{BF} = result
 
-When used with SVP64 Prefixing this is a [[openpower/sv/normal]]
+When used with SVP64 Prefixing this is a [[sv/normal]]
 SVP64 type operation and as such can use RC1 Data-dependent
 Mode capability
 
@@ -183,7 +183,7 @@ M=1. Correspondingly when M=0 this operation is an overwrite: no read
 of BF is required because the masked-out bits of the BF CR Field are
 set to zero.
 
-When used with SVP64 Prefixing this is a [[openpower/sv/cr_ops]] SVP64
+When used with SVP64 Prefixing this is a [[sv/cr_ops]] SVP64
 type operation that has 3-bit Data-dependent and 3-bit Predicate-result
 capability (BF is 3 bits)
 
@@ -211,7 +211,7 @@ M=1. Correspondingly when M=0 this operation is an overwrite: no read
 of BF is required because the masked-out bits of the BF CR Field are
 set to zero.
 
-When used with SVP64 Prefixing this is a [[openpower/sv/cr_ops]] SVP64
+When used with SVP64 Prefixing this is a [[sv/cr_ops]] SVP64
 type operation that has 3-bit Data-dependent and 3-bit Predicate-result
 capability (BF is 3 bits)
 
@@ -235,7 +235,7 @@ individual bits in BF may be set to 1 by ensuring that the required bit of
     result = n0|n1|n2|n3 if M else n0&n1&n2&n3
     CR{BF}[bit] = result
 
-When used with SVP64 Prefixing this is a [[openpower/sv/cr_ops]] SVP64
+When used with SVP64 Prefixing this is a [[sv/cr_ops]] SVP64
 type operation that has 5-bit Data-dependent and 5-bit Predicate-result
 capability (BFT is 5 bits)