r200ContextPtr rmesa = R200_CONTEXT(ctx);
static char buffer[128];
unsigned offset;
- GLuint agp_mode = (rmesa->r200Screen->card_type == RADEON_CARD_PCI)? 0 :
- rmesa->r200Screen->AGPMode;
+ GLuint agp_mode = (rmesa->radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
+ rmesa->radeonScreen->AGPMode;
switch ( name ) {
case GL_VENDOR:
rmesa->dri.fd = sPriv->fd;
rmesa->dri.drmMinor = sPriv->drm_version.minor;
- rmesa->r200Screen = screen;
+ rmesa->radeonScreen = screen;
rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
screen->sarea_priv_offset);
- rmesa->dma.buf0_address = rmesa->r200Screen->buffers->list[0].address;
+ rmesa->dma.buf0_address = rmesa->radeonScreen->buffers->list[0].address;
(void) memset( rmesa->texture_heaps, 0, sizeof( rmesa->texture_heaps ) );
make_empty_list( & rmesa->swapped );
ctx->Const.MinPointSizeAA = 1.0;
ctx->Const.MaxPointSizeAA = 1.0;
ctx->Const.PointSizeGranularity = 0.0625;
- if (rmesa->r200Screen->drmSupportsPointSprites)
+ if (rmesa->radeonScreen->drmSupportsPointSprites)
ctx->Const.MaxPointSize = 2047.0;
else
ctx->Const.MaxPointSize = 1.0;
_math_matrix_set_identity( &rmesa->tmpmat );
driInitExtensions( ctx, card_extensions, GL_TRUE );
- if (!(rmesa->r200Screen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
+ if (!(rmesa->radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
/* yuv textures don't work with some chips - R200 / rv280 okay so far
others get the bit ordering right but don't actually do YUV-RGB conversion */
_mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
_mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
}
- if (rmesa->r200Screen->drmSupportsCubeMapsR200)
+ if (rmesa->radeonScreen->drmSupportsCubeMapsR200)
_mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
- if (rmesa->r200Screen->drmSupportsBlendColor) {
+ if (rmesa->radeonScreen->drmSupportsBlendColor) {
driInitExtensions( ctx, blend_extensions, GL_FALSE );
}
- if(rmesa->r200Screen->drmSupportsVertexProgram)
+ if(rmesa->radeonScreen->drmSupportsVertexProgram)
driInitSingleExtension( ctx, ARB_vp_extension );
if(driQueryOptionb(&rmesa->optionCache, "nv_vertex_program"))
driInitSingleExtension( ctx, NV_vp_extension );
- if ((ctx->Const.MaxTextureUnits == 6) && rmesa->r200Screen->drmSupportsFragShader)
+ if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeonScreen->drmSupportsFragShader)
driInitSingleExtension( ctx, ATI_fs_extension );
- if (rmesa->r200Screen->drmSupportsPointSprites)
+ if (rmesa->radeonScreen->drmSupportsPointSprites)
driInitExtensions( ctx, point_extensions, GL_FALSE );
#if 0
r200InitDriverFuncs( ctx );
rmesa->iw.irq_seq = -1;
rmesa->irqsEmitted = 0;
rmesa->do_irqs = (fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS &&
- rmesa->r200Screen->irq);
+ rmesa->radeonScreen->irq);
rmesa->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
"IRQ's not enabled, falling back to %s: %d %d\n",
rmesa->do_usleeps ? "usleeps" : "busy waits",
fthrottle_mode,
- rmesa->r200Screen->irq);
+ rmesa->radeonScreen->irq);
rmesa->prefer_gart_client_texturing =
(getenv("R200_GART_CLIENT_TEXTURES") != 0);
FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
}
else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
- !(rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL)) {
- if (rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL) {
- rmesa->r200Screen->chip_flags &= ~RADEON_CHIPSET_TCL;
+ !(rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
+ if (rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
+ rmesa->radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
fprintf(stderr, "Disabling HW TCL support\n");
}
TCL_FALLBACK(rmesa->glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
if ( newCtx->dri.drawable != driDrawPriv ||
newCtx->lastStamp != driDrawPriv->lastStamp ) {
if (driDrawPriv->swap_interval == (unsigned)-1) {
- driDrawPriv->vblFlags = (newCtx->r200Screen->irq != 0)
+ driDrawPriv->vblFlags = (newCtx->radeonScreen->irq != 0)
? driGetDefaultVBlankFlags(&newCtx->optionCache)
: VBLANK_FLAG_NO_IRQ;
GLuint envneeded;
};
-#define GET_START(rvb) (rmesa->r200Screen->gart_buffer_offset + \
+#define GET_START(rvb) (rmesa->radeonScreen->gart_buffer_offset + \
(rvb)->address - rmesa->dma.buf0_address + \
(rvb)->start)
#define R200_CMD_BUF_SZ (16*1024)
-struct r200_store {
- GLuint statenr;
- GLuint primnr;
- char cmd_buf[R200_CMD_BUF_SZ];
- int cmd_used;
- int elts_start;
-};
-
/* r200_tcl.c
*/
*/
struct radeon_ioctl ioctl;
struct radeon_dma dma;
- struct r200_store store;
+ struct radeon_store store;
/* A full state emit as of the first state emit in the main store, in case
* the context is lost.
*/
- struct r200_store backup_store;
+ struct radeon_store backup_store;
/* Page flipping
*/
unsigned int lastStamp;
GLboolean lost_context;
GLboolean save_on_next_emit;
- radeonScreenPtr r200Screen; /* Screen private DRI data */
+ radeonScreenPtr radeonScreen; /* Screen private DRI data */
drm_radeon_sarea_t *sarea; /* Private SAREA data */
/* TCL stuff
static void r200BackUpAndEmitLostStateLocked( r200ContextPtr rmesa )
{
GLuint nr_released_bufs;
- struct r200_store saved_store;
+ struct radeon_store saved_store;
if (rmesa->backup_store.cmd_used == 0)
return;
fprintf(stderr, "Allocated buffer %d\n", index);
dmabuf = CALLOC_STRUCT( radeon_dma_buffer );
- dmabuf->buf = &rmesa->r200Screen->buffers->list[index];
+ dmabuf->buf = &rmesa->radeonScreen->buffers->list[index];
dmabuf->refcount = 1;
rmesa->dma.current.buf = dmabuf;
#if 000
if ( rmesa->sarea->pfCurrentPage == 1 ) {
- rmesa->state.color.drawOffset = rmesa->r200Screen->frontOffset;
- rmesa->state.color.drawPitch = rmesa->r200Screen->frontPitch;
+ rmesa->state.color.drawOffset = rmesa->radeonScreen->frontOffset;
+ rmesa->state.color.drawPitch = rmesa->radeonScreen->frontPitch;
} else {
- rmesa->state.color.drawOffset = rmesa->r200Screen->backOffset;
- rmesa->state.color.drawPitch = rmesa->r200Screen->backPitch;
+ rmesa->state.color.drawOffset = rmesa->radeonScreen->backOffset;
+ rmesa->state.color.drawPitch = rmesa->radeonScreen->backPitch;
}
R200_STATECHANGE( rmesa, ctx );
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = rmesa->state.color.drawOffset
- + rmesa->r200Screen->fbLocation;
+ + rmesa->radeonScreen->fbLocation;
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = rmesa->state.color.drawPitch;
if (rmesa->sarea->tiling_enabled) {
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
if (rmesa->using_hyperz) {
flags |= RADEON_USE_COMP_ZBUF;
-/* if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200)
+/* if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200)
flags |= RADEON_USE_HIERZ; */
if (!(rmesa->state.stencil.hwBuffer) ||
((flags & RADEON_DEPTH) && (flags & RADEON_STENCIL) &&
fprintf(stderr, "%s sz %d %f/%f/%f\n", __FUNCTION__, size, readfreq,
writefreq, priority);
- if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->r200Screen->gartTextures.map)
+ if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->radeonScreen->gartTextures.map)
return NULL;
if (getenv("R200_NO_ALLOC"))
alloc.size = size;
alloc.region_offset = ®ion_offset;
- ret = drmCommandWriteRead( rmesa->r200Screen->driScreen->fd,
+ ret = drmCommandWriteRead( rmesa->radeonScreen->driScreen->fd,
DRM_RADEON_ALLOC,
&alloc, sizeof(alloc));
}
{
- char *region_start = (char *)rmesa->r200Screen->gartTextures.map;
+ char *region_start = (char *)rmesa->radeonScreen->gartTextures.map;
return (void *)(region_start + region_offset);
}
}
if (R200_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s %p\n", __FUNCTION__, pointer);
- if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->r200Screen->gartTextures.map) {
+ if (!ctx || !(rmesa = R200_CONTEXT(ctx)) || !rmesa->radeonScreen->gartTextures.map) {
fprintf(stderr, "%s: no context\n", __FUNCTION__);
return;
}
- region_offset = (char *)pointer - (char *)rmesa->r200Screen->gartTextures.map;
+ region_offset = (char *)pointer - (char *)rmesa->radeonScreen->gartTextures.map;
if (region_offset < 0 ||
- region_offset > rmesa->r200Screen->gartTextures.size) {
+ region_offset > rmesa->radeonScreen->gartTextures.size) {
fprintf(stderr, "offset %d outside range 0..%d\n", region_offset,
- rmesa->r200Screen->gartTextures.size);
+ rmesa->radeonScreen->gartTextures.size);
return;
}
memfree.region = RADEON_MEM_REGION_GART;
memfree.region_offset = region_offset;
- ret = drmCommandWrite( rmesa->r200Screen->driScreen->fd,
+ ret = drmCommandWrite( rmesa->radeonScreen->driScreen->fd,
DRM_RADEON_FREE,
&memfree, sizeof(memfree));
card_offset = r200GartOffsetFromVirtual( rmesa, pointer );
- return card_offset - rmesa->r200Screen->gart_base;
+ return card_offset - rmesa->radeonScreen->gart_base;
}
GLboolean r200IsGartMemory( r200ContextPtr rmesa, const GLvoid *pointer,
GLint size )
{
- ptrdiff_t offset = (char *)pointer - (char *)rmesa->r200Screen->gartTextures.map;
+ ptrdiff_t offset = (char *)pointer - (char *)rmesa->radeonScreen->gartTextures.map;
int valid = (size >= 0 &&
offset >= 0 &&
- offset + size < rmesa->r200Screen->gartTextures.size);
+ offset + size < rmesa->radeonScreen->gartTextures.size);
if (R200_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "r200IsGartMemory( %p ) : %d\n", pointer, valid );
GLuint r200GartOffsetFromVirtual( r200ContextPtr rmesa, const GLvoid *pointer )
{
- ptrdiff_t offset = (char *)pointer - (char *)rmesa->r200Screen->gartTextures.map;
+ ptrdiff_t offset = (char *)pointer - (char *)rmesa->radeonScreen->gartTextures.map;
- if (offset < 0 || offset > rmesa->r200Screen->gartTextures.size)
+ if (offset < 0 || offset > rmesa->radeonScreen->gartTextures.size)
return ~0;
else
- return rmesa->r200Screen->gart_texture_offset + offset;
+ return rmesa->radeonScreen->gart_texture_offset + offset;
}
const void *pixels, GLint sz, GLint pitch )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- GLuint cpp = rmesa->r200Screen->cpp;
+ GLuint cpp = rmesa->radeonScreen->cpp;
if (R200_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
if (*height <= 0)
return GL_FALSE;
- *size = ((*y + *height - 1) * rmesa->r200Screen->frontPitch +
- (*x + *width - 1) * rmesa->r200Screen->cpp);
+ *size = ((*y + *height - 1) * rmesa->radeonScreen->frontPitch +
+ (*x + *width - 1) * rmesa->radeonScreen->cpp);
return GL_TRUE;
}
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLint pitch = pack->RowLength ? pack->RowLength : width;
GLint blit_format;
- GLuint cpp = rmesa->r200Screen->cpp;
+ GLuint cpp = rmesa->radeonScreen->cpp;
GLint size = width * height * cpp;
if (R200_DEBUG & DEBUG_PIXEL)
/* Only accelerate reading to GART buffers.
*/
if ( !r200IsGartMemory(rmesa, pixels,
- pitch * height * rmesa->r200Screen->cpp ) ) {
+ pitch * height * rmesa->radeonScreen->cpp ) ) {
if (R200_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s: dest not GART\n", __FUNCTION__);
return GL_FALSE;
if (!check_color(ctx, type, format, pack, pixels, size, pitch))
return GL_FALSE;
- switch ( rmesa->r200Screen->cpp ) {
+ switch ( rmesa->radeonScreen->cpp ) {
case 4:
blit_format = R200_CP_COLOR_FORMAT_ARGB8888;
break;
driRenderbuffer *drb = (driRenderbuffer *) ctx->ReadBuffer->_ColorReadBuffer;
int nbox = dPriv->numClipRects;
int src_offset = drb->offset
- + rmesa->r200Screen->fbLocation;
+ + rmesa->radeonScreen->fbLocation;
int src_pitch = drb->pitch * drb->cpp;
int dst_offset = r200GartOffsetFromVirtual( rmesa, pixels );
- int dst_pitch = pitch * rmesa->r200Screen->cpp;
+ int dst_pitch = pitch * rmesa->radeonScreen->cpp;
drm_clip_rect_t *box = dPriv->pClipRects;
int i;
int blit_format;
int size;
int src_offset = r200GartOffsetFromVirtual( rmesa, pixels );
- int src_pitch = pitch * rmesa->r200Screen->cpp;
+ int src_pitch = pitch * rmesa->radeonScreen->cpp;
if (R200_DEBUG & DEBUG_PIXEL)
fprintf(stderr, "%s\n", __FUNCTION__);
- switch ( rmesa->r200Screen->cpp ) {
+ switch ( rmesa->radeonScreen->cpp ) {
case 2:
blit_format = R200_CP_COLOR_FORMAT_RGB565;
break;
blit_format,
src_pitch, src_offset,
drb->pitch * drb->cpp,
- drb->offset + rmesa->r200Screen->fbLocation,
+ drb->offset + rmesa->radeonScreen->fbLocation,
bx - x, by - y,
bx, by,
bw, bh );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLint pitch = unpack->RowLength ? unpack->RowLength : width;
GLuint planemask;
- GLuint cpp = rmesa->r200Screen->cpp;
+ GLuint cpp = rmesa->radeonScreen->cpp;
GLint size = height * pitch * cpp;
if (R200_DEBUG & DEBUG_PIXEL)
CLAMPED_FLOAT_TO_UBYTE(color[1], cf[1]);
CLAMPED_FLOAT_TO_UBYTE(color[2], cf[2]);
CLAMPED_FLOAT_TO_UBYTE(color[3], cf[3]);
- if (rmesa->r200Screen->drmSupportsBlendColor)
+ if (rmesa->radeonScreen->drmSupportsBlendColor)
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = radeonPackColor( 4, color[0], color[1], color[2], color[3] );
}
R200_STATECHANGE( rmesa, ctx );
- if (rmesa->r200Screen->drmSupportsBlendColor) {
+ if (rmesa->radeonScreen->drmSupportsBlendColor) {
if (ctx->Color.ColorLogicOpEnabled) {
rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] = cntl | R200_ROP_ENABLE;
rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = eqn | func;
return;
}
- if (!rmesa->r200Screen->drmSupportsBlendColor) {
+ if (!rmesa->radeonScreen->drmSupportsBlendColor) {
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = eqn | func;
return;
}
GLboolean b, GLboolean a )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- GLuint mask = radeonPackColor( rmesa->r200Screen->cpp,
+ GLuint mask = radeonPackColor( rmesa->radeonScreen->cpp,
ctx->Color.ColorMask[RCOMP],
ctx->Color.ColorMask[GCOMP],
ctx->Color.ColorMask[BCOMP],
CLAMPED_FLOAT_TO_UBYTE(color[1], c[1]);
CLAMPED_FLOAT_TO_UBYTE(color[2], c[2]);
CLAMPED_FLOAT_TO_UBYTE(color[3], c[3]);
- rmesa->state.color.clear = radeonPackColor( rmesa->r200Screen->cpp,
+ rmesa->state.color.clear = radeonPackColor( rmesa->radeonScreen->cpp,
color[0], color[1],
color[2], color[3] );
}
/* Note: we used the (possibly) page-flipped values */
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET]
- = ((drb->flippedOffset + rmesa->r200Screen->fbLocation)
+ = ((drb->flippedOffset + rmesa->radeonScreen->fbLocation)
& R200_COLOROFFSET_MASK);
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = drb->flippedPitch;
if (rmesa->sarea->tiling_enabled) {
GLuint color_fmt, depth_fmt, i;
GLint drawPitch, drawOffset;
- switch ( rmesa->r200Screen->cpp ) {
+ switch ( rmesa->radeonScreen->cpp ) {
case 2:
color_fmt = R200_COLOR_FORMAT_RGB565;
break;
rmesa->Fallback = 0;
if ( ctx->Visual.doubleBufferMode && rmesa->sarea->pfCurrentPage == 0 ) {
- drawOffset = rmesa->r200Screen->backOffset;
- drawPitch = rmesa->r200Screen->backPitch;
+ drawOffset = rmesa->radeonScreen->backOffset;
+ drawPitch = rmesa->radeonScreen->backPitch;
} else {
- drawOffset = rmesa->r200Screen->frontOffset;
- drawPitch = rmesa->r200Screen->frontPitch;
+ drawOffset = rmesa->radeonScreen->frontOffset;
+ drawPitch = rmesa->radeonScreen->frontPitch;
}
#if 000
if ( ctx->Visual.doubleBufferMode && rmesa->sarea->pfCurrentPage == 0 ) {
- rmesa->state.color.drawOffset = rmesa->r200Screen->backOffset;
- rmesa->state.color.drawPitch = rmesa->r200Screen->backPitch;
+ rmesa->state.color.drawOffset = rmesa->radeonScreen->backOffset;
+ rmesa->state.color.drawPitch = rmesa->radeonScreen->backPitch;
} else {
- rmesa->state.color.drawOffset = rmesa->r200Screen->frontOffset;
- rmesa->state.color.drawPitch = rmesa->r200Screen->frontPitch;
+ rmesa->state.color.drawOffset = rmesa->radeonScreen->frontOffset;
+ rmesa->state.color.drawPitch = rmesa->radeonScreen->frontPitch;
}
rmesa->state.pixel.readOffset = rmesa->state.color.drawOffset;
/* Allocate state buffers:
*/
- if (rmesa->r200Screen->drmSupportsBlendColor)
+ if (rmesa->radeonScreen->drmSupportsBlendColor)
ALLOC_STATE( ctx, always, CTX_STATE_SIZE_NEWDRM, "CTX/context", 0 );
else
ALLOC_STATE( ctx, always, CTX_STATE_SIZE_OLDDRM, "CTX/context", 0 );
ALLOC_STATE( cst, always, CST_STATE_SIZE, "CST/constant", 0 );
ALLOC_STATE( zbs, always, ZBS_STATE_SIZE, "ZBS/zbias", 0 );
ALLOC_STATE( tf, tf, TF_STATE_SIZE, "TF/tfactor", 0 );
- if (rmesa->r200Screen->drmSupportsFragShader) {
- if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200) {
+ if (rmesa->radeonScreen->drmSupportsFragShader) {
+ if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200) {
/* make sure texture units 0/1 are emitted pair-wise for r200 t0 hang workaround */
ALLOC_STATE( tex[0], tex_pair, TEX_STATE_SIZE_NEWDRM, "TEX/tex-0", 0 );
ALLOC_STATE( tex[1], tex_pair, TEX_STATE_SIZE_NEWDRM, "TEX/tex-1", 1 );
ALLOC_STATE( afs[1], afs, AFS_STATE_SIZE, "AFS/afsinst-1", 1 );
}
else {
- if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200) {
+ if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200) {
ALLOC_STATE( tex[0], tex_pair, TEX_STATE_SIZE_OLDDRM, "TEX/tex-0", 0 );
ALLOC_STATE( tex[1], tex_pair, TEX_STATE_SIZE_OLDDRM, "TEX/tex-1", 1 );
ALLOC_STATE( tam, tex_any, TAM_STATE_SIZE, "TAM/tam", 0 );
ALLOC_STATE( afs[0], never, AFS_STATE_SIZE, "AFS/afsinst-0", 0 );
ALLOC_STATE( afs[1], never, AFS_STATE_SIZE, "AFS/afsinst-1", 1 );
}
- if (rmesa->r200Screen->drmSupportsCubeMapsR200) {
+ if (rmesa->radeonScreen->drmSupportsCubeMapsR200) {
ALLOC_STATE( cube[0], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-0", 0 );
ALLOC_STATE( cube[1], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-1", 1 );
ALLOC_STATE( cube[2], tex_cube, CUBE_STATE_SIZE, "CUBE/tex-2", 2 );
ALLOC_STATE( cube[4], never, CUBE_STATE_SIZE, "CUBE/tex-4", 4 );
ALLOC_STATE( cube[5], never, CUBE_STATE_SIZE, "CUBE/tex-5", 5 );
}
- if (rmesa->r200Screen->drmSupportsVertexProgram) {
+ if (rmesa->radeonScreen->drmSupportsVertexProgram) {
ALLOC_STATE( pvs, tcl_vp, PVS_STATE_SIZE, "PVS/pvscntl", 0 );
ALLOC_STATE( vpi[0], tcl_vp, VPI_STATE_SIZE, "VP/vertexprog-0", 0 );
ALLOC_STATE( vpi[1], tcl_vp_size, VPI_STATE_SIZE, "VP/vertexprog-1", 1 );
ALLOC_STATE( pix[3], texenv, PIX_STATE_SIZE, "PIX/pixstage-3", 3 );
ALLOC_STATE( pix[4], texenv, PIX_STATE_SIZE, "PIX/pixstage-4", 4 );
ALLOC_STATE( pix[5], texenv, PIX_STATE_SIZE, "PIX/pixstage-5", 5 );
- if (rmesa->r200Screen->drmSupportsTriPerf) {
+ if (rmesa->radeonScreen->drmSupportsTriPerf) {
ALLOC_STATE( prf, always, PRF_STATE_SIZE, "PRF/performance-tri", 0 );
}
else {
ALLOC_STATE( prf, never, PRF_STATE_SIZE, "PRF/performance-tri", 0 );
}
- if (rmesa->r200Screen->drmSupportsPointSprites) {
+ if (rmesa->radeonScreen->drmSupportsPointSprites) {
ALLOC_STATE( spr, always, SPR_STATE_SIZE, "SPR/pointsprite", 0 );
ALLOC_STATE( ptp, tcl, PTP_STATE_SIZE, "PTP/pointparams", 0 );
}
rmesa->hw.ctx.cmd[CTX_CMD_0] = cmdpkt(RADEON_EMIT_PP_MISC);
rmesa->hw.ctx.cmd[CTX_CMD_1] = cmdpkt(RADEON_EMIT_PP_CNTL);
rmesa->hw.ctx.cmd[CTX_CMD_2] = cmdpkt(RADEON_EMIT_RB3D_COLORPITCH);
- if (rmesa->r200Screen->drmSupportsBlendColor)
+ if (rmesa->radeonScreen->drmSupportsBlendColor)
rmesa->hw.ctx.cmd[CTX_CMD_3] = cmdpkt(R200_EMIT_RB3D_BLENDCOLOR);
rmesa->hw.lin.cmd[LIN_CMD_0] = cmdpkt(RADEON_EMIT_RE_LINE_PATTERN);
rmesa->hw.lin.cmd[LIN_CMD_1] = cmdpkt(RADEON_EMIT_SE_LINE_WIDTH);
rmesa->hw.cst.cmd[CST_CMD_6] = cmdpkt(R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0);
rmesa->hw.tam.cmd[TAM_CMD_0] = cmdpkt(R200_EMIT_PP_TAM_DEBUG3);
rmesa->hw.tf.cmd[TF_CMD_0] = cmdpkt(R200_EMIT_TFACTOR_0);
- if (rmesa->r200Screen->drmSupportsFragShader) {
+ if (rmesa->radeonScreen->drmSupportsFragShader) {
rmesa->hw.atf.cmd[ATF_CMD_0] = cmdpkt(R200_EMIT_ATF_TFACTOR);
rmesa->hw.tex[0].cmd[TEX_CMD_0] = cmdpkt(R200_EMIT_PP_TXCTLALL_0);
rmesa->hw.tex[0].cmd[TEX_CMD_1_NEWDRM] = cmdpkt(R200_EMIT_PP_TXOFFSET_0);
(R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
(R200_BLEND_GL_ZERO << R200_DST_BLEND_SHIFT));
- if (rmesa->r200Screen->drmSupportsBlendColor) {
+ if (rmesa->radeonScreen->drmSupportsBlendColor) {
rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCOLOR] = 0x00000000;
rmesa->hw.ctx.cmd[CTX_RB3D_ABLENDCNTL] = (R200_COMB_FCN_ADD_CLAMP |
(R200_BLEND_GL_ONE << R200_SRC_BLEND_SHIFT) |
}
rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHOFFSET] =
- rmesa->r200Screen->depthOffset + rmesa->r200Screen->fbLocation;
+ rmesa->radeonScreen->depthOffset + rmesa->radeonScreen->fbLocation;
rmesa->hw.ctx.cmd[CTX_RB3D_DEPTHPITCH] =
- ((rmesa->r200Screen->depthPitch &
+ ((rmesa->radeonScreen->depthPitch &
R200_DEPTHPITCH_MASK) |
R200_DEPTH_ENDIAN_NO_SWAP);
if (rmesa->using_hyperz) {
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= R200_Z_COMPRESSION_ENABLE |
R200_Z_DECOMPRESSION_ENABLE;
-/* if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200)
+/* if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200)
rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_HIERARCHY_ENABLE;*/
}
#if 000
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = ((rmesa->state.color.drawOffset +
- rmesa->r200Screen->fbLocation)
+ rmesa->radeonScreen->fbLocation)
& R200_COLOROFFSET_MASK);
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = ((rmesa->state.color.drawPitch &
R200_COLOR_ENDIAN_NO_SWAP);
#else
rmesa->hw.ctx.cmd[CTX_RB3D_COLOROFFSET] = ((drawOffset +
- rmesa->r200Screen->fbLocation)
+ rmesa->radeonScreen->fbLocation)
& R200_COLOROFFSET_MASK);
rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] = ((drawPitch &
R200_VC_NO_SWAP;
#endif
- if (!(rmesa->r200Screen->chip_flags & RADEON_CHIPSET_TCL)) {
+ if (!(rmesa->radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
/* Bypass TCL */
rmesa->hw.cst.cmd[CST_SE_VAP_CNTL_STATUS] |= (1<<8);
}
rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] =
(/* R200_TEXCOORD_PROJ | */
0x100000); /* Small default bias */
- if (rmesa->r200Screen->drmSupportsFragShader) {
+ if (rmesa->radeonScreen->drmSupportsFragShader) {
rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_NEWDRM] =
- rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
+ rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.tex[i].cmd[TEX_PP_CUBIC_FACES] = 0;
rmesa->hw.tex[i].cmd[TEX_PP_TXMULTI_CTL] = 0;
}
else {
rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET_OLDDRM] =
- rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
+ rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
}
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0;
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F1] =
- rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
+ rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F2] =
- rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
+ rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F3] =
- rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
+ rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F4] =
- rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
+ rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F5] =
- rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
+ rmesa->radeonScreen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.pix[i].cmd[PIX_PP_TXCBLEND] =
(R200_TXC_ARG_A_ZERO |
if (rmesa->dma.current.buf) {
struct radeon_dma_region *current = &rmesa->dma.current;
- GLuint current_offset = (rmesa->r200Screen->gart_buffer_offset +
+ GLuint current_offset = (rmesa->radeonScreen->gart_buffer_offset +
current->buf->buf->idx * RADEON_BUFFER_SIZE +
current->start);
}
/* Set the base offset of the texture image */
- t->bufAddr = rmesa->r200Screen->texOffset[heap]
+ t->bufAddr = rmesa->radeonScreen->texOffset[heap]
+ t->base.memBlock->ofs;
t->pp_txoffset = t->bufAddr;
cmd[TEX_PP_TXSIZE] = texobj->pp_txsize; /* NPOT only! */
cmd[TEX_PP_TXPITCH] = texobj->pp_txpitch; /* NPOT only! */
cmd[TEX_PP_BORDER_COLOR] = texobj->pp_border_color;
- if (rmesa->r200Screen->drmSupportsFragShader) {
+ if (rmesa->radeonScreen->drmSupportsFragShader) {
cmd[TEX_PP_TXOFFSET_NEWDRM] = texobj->pp_txoffset;
}
else {
R200_STATECHANGE( rmesa, cube[unit] );
cube_cmd[CUBE_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
- if (rmesa->r200Screen->drmSupportsFragShader) {
+ if (rmesa->radeonScreen->drmSupportsFragShader) {
/* that value is submitted twice. could change cube atom
to not include that command when new drm is used */
cmd[TEX_PP_CUBIC_FACES] = texobj->pp_cubic_faces;
r200ChooseVertexState( ctx );
- if (rmesa->r200Screen->chip_family == CHIP_FAMILY_R200) {
+ if (rmesa->radeonScreen->chip_family == CHIP_FAMILY_R200) {
/*
* T0 hang workaround -------------
}
/* could optimize setting up vertex progs away for non-tcl hw */
fallback = !(vp->native && r200VertexProgUpdateParams(ctx, vp) &&
- rmesa->r200Screen->drmSupportsVertexProgram);
+ rmesa->radeonScreen->drmSupportsVertexProgram);
TCL_FALLBACK(ctx, R200_TCL_FALLBACK_VERTEX_PROGRAM, fallback);
if (rmesa->TclFallback) return;
}
}
+#define MAX_CMD_BUF_SZ (16*1024)
+
+struct radeon_store {
+ GLuint statenr;
+ GLuint primnr;
+ char cmd_buf[MAX_CMD_BUF_SZ];
+ int cmd_used;
+ int elts_start;
+};
+
struct radeon_dri_mirror {
__DRIcontextPrivate *context; /* DRI context */
__DRIscreenPrivate *screen; /* DRI screen */
#define DEBUG_SYNC 0x1000
#define DEBUG_PIXEL 0x2000
#define DEBUG_MEMORY 0x4000
+
#define RADEON_CMD_BUF_SZ (8*1024)
-struct radeon_store {
- GLuint statenr;
- GLuint primnr;
- char cmd_buf[RADEON_CMD_BUF_SZ];
- int cmd_used;
- int elts_start;
-};
-
/* radeon_tcl.c
*/
struct radeon_tcl_info {