re PR bootstrap/88714 (bootstrap comparison failure on armv7l since r265398)

	PR bootstrap/88714
	* config/arm/arm.md (*arm_movdi, *movdf_soft_insn): Use "r" instead of
	"q" constraint.
	* config/arm/vfp.md (*movdi_vfp): Likewise.
	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use "r" instead of
	"q" constraint for operands[0].

From-SVN: r268985

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f8cd9cfc28fca8853c3b515227716c499db6a800..553f0189f768cddd232e43970a823511f272d3a3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
 2019-02-18  Jakub Jelinek  <jakub@redhat.com>
 
+       PR bootstrap/88714
+       * config/arm/arm.md (*arm_movdi, *movdf_soft_insn): Use "r" instead of
+       "q" constraint.
+       * config/arm/vfp.md (*movdi_vfp): Likewise.
+       * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use "r" instead of
+       "q" constraint for operands[0].
+
        PR target/89369
        * config/s390/s390.md (*r<noxa>sbg_<mode>_srl_bitmask,
        *r<noxa>sbg_<mode>_sll, *r<noxa>sbg_<mode>_srl): Don't construct

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index aa759624f8f617576773aa75fd6239d6e06e8a13..0e35d03afd1b8acc269b8df37971cce8b8edc254 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -5817,8 +5817,8 @@
 )
 
 (define_insn "*arm_movdi"
-  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, q, m")
-       (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,q"))]
+  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, r, r, m")
+       (match_operand:DI 1 "di_operand"              "rDa,Db,Dc,mi,r"))]
   "TARGET_32BIT
    && !(TARGET_HARD_FLOAT)
    && !TARGET_IWMMXT
@@ -7102,8 +7102,8 @@
 )
 
 (define_insn "*movdf_soft_insn"
-  [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,q,m")
-       (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,q"))]
+  [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=r,r,r,r,m")
+       (match_operand:DF 1 "soft_df_operand" "rDa,Db,Dc,mF,r"))]
   "TARGET_32BIT && TARGET_SOFT_FLOAT
    && (   register_operand (operands[0], DFmode)
        || register_operand (operands[1], DFmode))"

diff --git a/gcc/config/arm/ldrdstrd.md b/gcc/config/arm/ldrdstrd.md
index c937591ad40176ccf981a271690899aaaf50ef9c..bb492bb2915096bca0e0bac38fd6e2d0c5a450c3 100644 (file)
--- a/gcc/config/arm/ldrdstrd.md
+++ b/gcc/config/arm/ldrdstrd.md
@@ -157,7 +157,7 @@
 ;; We use gen_operands_ldrd_strd() with a modify argument as false so that the
 ;; operands are not changed.
 (define_insn "*arm_ldrd"
-  [(parallel [(set (match_operand:SI 0 "s_register_operand" "=q")
+  [(parallel [(set (match_operand:SI 0 "s_register_operand" "=r")
                   (match_operand:SI 2 "memory_operand" "m"))
              (set (match_operand:SI 1 "s_register_operand" "=q")
                   (match_operand:SI 3 "memory_operand" "m"))])]
@@ -178,7 +178,7 @@
 
 (define_insn "*arm_strd"
   [(parallel [(set (match_operand:SI 2 "memory_operand" "=m")
-                  (match_operand:SI 0 "s_register_operand" "q"))
+                  (match_operand:SI 0 "s_register_operand" "r"))
              (set (match_operand:SI 3 "memory_operand" "=m")
                   (match_operand:SI 1 "s_register_operand" "q"))])]
   "TARGET_LDRD && TARGET_ARM && reload_completed

diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index f6a5023adc2bda852bfbcaab6aa9d183ab0cf35b..e1c39744ceba6754a6150c36e63b9763b8eb813a 100644 (file)
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -307,8 +307,8 @@
 ;; DImode moves
 
 (define_insn "*movdi_vfp"
-  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,q,q,m,w,!r,w,w, Uv")
-       (match_operand:DI 1 "di_operand"              "r,rDa,Db,Dc,mi,mi,q,r,w,w,UvTu,w"))]
+  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv")
+       (match_operand:DI 1 "di_operand"              "r,rDa,Db,Dc,mi,mi,r,r,w,w,UvTu,w"))]
   "TARGET_32BIT && TARGET_HARD_FLOAT
    && (   register_operand (operands[0], DImode)
        || register_operand (operands[1], DImode))