mibuild/lattice: add LatticeAsyncResetSynchronizer
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 17 Mar 2015 11:42:36 +0000 (12:42 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 17 Mar 2015 11:42:36 +0000 (12:42 +0100)
mibuild/lattice/common.py

index e238a327ab80ed54b9d5d8c4c780e22e6cb4fde9..1f5654c4812bf804dec6af2f951c5eb19960c6cd 100644 (file)
@@ -1,6 +1,21 @@
 from migen.fhdl.std import *
 from migen.genlib.io import *
 
+class LatticeAsyncResetSynchronizerImpl(Module):
+       def __init__(self, cd, async_reset):
+               rst1 = Signal()
+               self.specials += [
+                       Instance("FD1S3BX", i_D=0, i_PD=async_reset,
+                               i_CK=cd.clk, o_Q=rst1),
+                       Instance("FD1S3BX", i_D=rst1, i_PD=async_reset,
+                               i_CK=cd.clk, o_Q=cd.rst)
+               ]
+
+class LatticeAsyncResetSynchronizer:
+       @staticmethod
+       def lower(dr):
+               return LatticeAsyncResetSynchronizerImpl(dr.cd, dr.async_reset)
+
 class LatticeDDROutputImpl(Module):
        def __init__(self, i1, i2, o, clk):
                self.specials += Instance("ODDRA",
@@ -14,5 +29,6 @@ class LatticeDDROutput:
                return LatticeDDROutputImpl(dr.i1, dr.i2, dr.o, dr.clk)
 
 lattice_special_overrides = {
+       AsyncResetSynchronizer: LatticeAsyncResetSynchronizer,
        DDROutput:      LatticeDDROutput
 }