<p>A chip with lots of peripherals. And a VPU. And a 3D GPU...</p>
- <p>Oh and here, have the <a href="http://git.libre-riscv.org">source code</a>...</p>
+ <p>Oh and here, have the <a href="http://git.libre-soc.org">source code</a>...</p>
</blockquote>
<hr class="my-4">
just get in touch on the list, there is plenty to do.
1. First, join the
- [mailing list](http://lists.libre-riscv.org/mailman/listinfo/libre-riscv-dev),
+ [mailing list](http://lists.libre-soc.org/mailman/listinfo/libre-soc-dev),
introduce yourself (people will happily say "hello" back"). Read through
- [recent posts](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/)
+ [recent posts](http://lists.libre-soc.org/pipermail/libre-soc-dev/)
and the [[charter]], and let everyone know, on the list that you're
happy with it and agree to it.
2. The next thing you should do is read through the
- [bugs list](http://bugs.libre-riscv.org) and
+ [bugs list](http://bugs.libre-soc.org) and
see if there are any bugs that pique your interest.
A fascinating way to do that is to view the
[dependency graph](https://bugs.libre-soc.org/showdependencygraph.cgi?id=1&display=web&rankdir=LR)
3. After that, go ahead and take a look at the
- [git repositories](https://git.libre-riscv.org).
+ [git repositories](https://git.libre-soc.org).
4. If you plan to do HDL work, you should familiarize yourself with our
[[HDL_workflow]]. If you would like to help with the ASIC layout,
see [[HDL_workflow/coriolis2]]