re PR bootstrap/48337 (options.c doesn't compile on SPARC)
authorJoseph Myers <joseph@codesourcery.com>
Wed, 30 Mar 2011 10:01:13 +0000 (11:01 +0100)
committerRainer Orth <ro@gcc.gnu.org>
Wed, 30 Mar 2011 10:01:13 +0000 (10:01 +0000)
2011-03-30  Joseph Myers  <joseph@codesourcery.com>
    Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

PR bootstrap/48337
* config/sparc/sparc.opt (sparc_cpu_and_features): Add
Init(PROCESSOR_V7).
(sparc_cpu): Likewise.
* config/sparc/sparc.c (sparc_option_override): Replace 0 by
PROCESSOR_V7.

Co-Authored-By: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
From-SVN: r171717

gcc/ChangeLog
gcc/config/sparc/sparc.c
gcc/config/sparc/sparc.opt

index 689f2916faab00682570dc392c3591b0cca19973..cd95c4a907085200a1baaa817d2520ce5b72ce9c 100644 (file)
@@ -1,3 +1,13 @@
+2011-03-30  Joseph Myers  <joseph@codesourcery.com>
+           Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+       PR bootstrap/48337
+       * config/sparc/sparc.opt (sparc_cpu_and_features): Add
+       Init(PROCESSOR_V7).
+       (sparc_cpu): Likewise.
+       * config/sparc/sparc.c (sparc_option_override): Replace 0 by
+       PROCESSOR_V7.
+
 2011-03-29  Vladimir Makarov  <vmakarov@redhat.com>
 
        PR target/48336
index a90cdb324f507f8b904c5600c8f94f69c26696f6..1e7ce5356544ad72015b3c431ba8107a99e8952d 100644 (file)
@@ -695,7 +695,7 @@ sparc_option_override (void)
     { TARGET_CPU_ultrasparc3, PROCESSOR_ULTRASPARC3 },
     { TARGET_CPU_niagara, PROCESSOR_NIAGARA },
     { TARGET_CPU_niagara2, PROCESSOR_NIAGARA2 },
-    { -1, 0 }
+    { -1, PROCESSOR_V7 }
   };
   const struct cpu_default *def;
   /* Table of values for -m{cpu,tune}=.  This must match the order of
index 9d8e26b75424739faa366b4b3a33115182bb1c00..b7fac0946e6e8e58366f9de2cbb563fa0c1d00e8 100644 (file)
@@ -86,11 +86,11 @@ Target
 Optimize tail call instructions in assembler and linker
 
 mcpu=
-Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type)
+Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 Use features of and schedule code for given CPU
 
 mtune=
-Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type)
+Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
 Schedule code for given CPU
 
 Enum