i386: Fix insn conditions of mfence patterns [PR95750]
authorUros Bizjak <ubizjak@gmail.com>
Tue, 21 Jul 2020 18:22:05 +0000 (20:22 +0200)
committerUros Bizjak <ubizjak@gmail.com>
Tue, 21 Jul 2020 18:22:45 +0000 (20:22 +0200)
2020-07-21  Uroš Bizjak  <ubizjak@gmail.com>

gcc/ChangeLog:
PR target/95750
* config/i386/sync.md (mfence_sse2): Enable for
TARGET_64BIT and TARGET_SSE2.
(mfence_nosse): Always enable.

gcc/config/i386/sync.md

index c6827037abf350e62580121734f9fddb98fd4327..c88750d3664174e3ca3f10a6991bf9e867014896 100644 (file)
@@ -89,8 +89,7 @@
 (define_insn "mfence_sse2"
   [(set (match_operand:BLK 0)
        (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))]
-  "(TARGET_64BIT || TARGET_SSE2)
-   && !TARGET_AVOID_MFENCE"
+  "TARGET_64BIT || TARGET_SSE2"
   "mfence"
   [(set_attr "type" "sse")
    (set_attr "length_address" "0")
   [(set (match_operand:BLK 0)
        (unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))
    (clobber (reg:CC FLAGS_REG))]
-  "!(TARGET_64BIT || TARGET_SSE2)
-   || TARGET_AVOID_MFENCE"
+  ""
 {
   rtx mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);