Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA).
+ register RB shifted by (SH+1), and (RA).
RS[56:63] are stored into the byte in storage addressed
by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA|0).
+ register RB shifted by (SH+1), and (RA|0).
RS[48:63] are stored into the halfword in
storage addressed by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA).
+ register RB shifted by (SH+1), and (RA).
RS[48:63] are stored into the halfword in storage
addressed by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA|0).
+ register RB shifted by (SH+1), and (RA|0).
RS[32:63] are stored into the word in storage
addressed by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA).
+ register RB shifted by (SH+1), and (RA).
RS[32:63] are stored into the word in storage addressed
by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA|0).
+ register RB shifted by (SH+1), and (RA|0).
(RS) is stored into the doubleword in
storage addressed by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register (RB) shifted by (SH+1) and (RA).
+ register (RB) shifted by (SH+1), and (RA).
(RS) is stored into the doubleword in storage
addressed by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA|0).
+ register RB shifted by (SH+1), and (RA|0).
(RS)56:63 are stored into bits 0:7 of the
halfword in storage addressed by EA. (RS) 48:55 are
stored into bits 8:15 of the halfword in storage
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA|0).
+ register RB shifted by (SH+1), and (RA|0).
(RS)[56:63] are stored into bits 0:7 of the
word in storage addressed by EA. (RS) [48:55] are stored
into bits 8:15 of the word in storage addressed by EA.
Description:
Let the effective address (EA) be the sum of the contents of
- register RB shifted by (SH+1) and (RA|0).
+ register RB shifted by (SH+1), and (RA|0).
(RS)[56:63] are stored into bits 0:7 of the
doubleword in storage addressed by EA. (RS) [48:55] are
stored into bits 8:15 of the doubleword in storage