radeon/llvm: improve ABS_i32 lowering
authorVadim Girlin <vadimgirlin@gmail.com>
Tue, 15 May 2012 14:47:53 +0000 (18:47 +0400)
committerVadim Girlin <vadimgirlin@gmail.com>
Tue, 15 May 2012 14:47:53 +0000 (18:47 +0400)
We can save one instruction by lowering it to:
  SUB_INT tmp, 0, src
  MAX_INT dst, src, tmp

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
src/gallium/drivers/radeon/R600LowerInstructions.cpp

index 41bf365eabd2ff40d152a24a944e6aee0816c522..42c976601e525dcfaf5a7851c08b8a133ba230ca 100644 (file)
@@ -90,24 +90,16 @@ bool R600LowerInstructionsPass::runOnMachineFunction(MachineFunction &MF)
 
       case AMDIL::ABS_i32:
         {
-          unsigned setgt = MRI->createVirtualRegister(
+          unsigned neg = MRI->createVirtualRegister(
                            &AMDIL::R600_TReg32RegClass);
-          BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::SETGE_INT),
-                  setgt)
+          BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::SUB_INT),neg)
                   .addReg(AMDIL::ZERO)
                   .addOperand(MI.getOperand(1));
 
-          unsigned add_int = MRI->createVirtualRegister(
-                             &AMDIL::R600_TReg32RegClass);
-          BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::ADD_INT),
-                  add_int)
-                  .addReg(setgt)
-                  .addOperand(MI.getOperand(1));
-
-          BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::XOR_INT))
+          BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(AMDIL::MAX_INT))
                   .addOperand(MI.getOperand(0))
-                  .addReg(setgt)
-                  .addReg(add_int);
+                  .addOperand(MI.getOperand(1))
+                  .addReg(neg);
 
           break;
         }