X86: Make shifts/rotations that write to 32 bits of a register zero extend.

diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa
index 447939abdcc324026bbcc2b9023f6d87b610def9..85fe8fe5170107db527a8e4195e741ed947803c4 100644 (file)
--- a/src/arch/x86/isa/microops/regop.isa
+++ b/src/arch/x86/isa/microops/regop.isa
@@ -734,7 +734,7 @@ let {{
                 DestReg = merge(DestReg, top | bottom, dataSize);
             }
             else
-                DestReg = DestReg;
+                DestReg = merge(DestReg, DestReg, dataSize);
             '''
         flag_code = '''
             // If the shift amount is zero, no flags should be modified.
@@ -771,7 +771,7 @@ let {{
                 DestReg = merge(DestReg, top | bottom, dataSize);
             }
             else
-                DestReg = DestReg;
+                DestReg = merge(DestReg, DestReg, dataSize);
             '''
         flag_code = '''
             // If the shift amount is zero, no flags should be modified.
@@ -805,7 +805,7 @@ let {{
                 DestReg = merge(DestReg, top | bottom, dataSize);
             }
             else
-                DestReg = DestReg;
+                DestReg = merge(DestReg, DestReg, dataSize);
             '''
         flag_code = '''
             // If the shift amount is zero, no flags should be modified.
@@ -844,7 +844,7 @@ let {{
                 DestReg = merge(DestReg, top | bottom, dataSize);
             }
             else
-                DestReg = DestReg;
+                DestReg = merge(DestReg, DestReg, dataSize);
             '''
         flag_code = '''
             // If the shift amount is zero, no flags should be modified.