freedreno/ir3: fix mad 3rd src delay calc

In fad158a0 ("freedreno/ir3: array rework") the src # (n) shifted by
one, but missed updating delay-slot calc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/ir3/ir3_depth.c b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
index 3354cbd23fa1a527f96648a7e4a8bba320fe4e5d..6d294f1a48c011af21ac3f38f1819f66143fd2f9 100644 (file)
--- a/src/gallium/drivers/freedreno/ir3/ir3_depth.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_depth.c
@@ -76,7 +76,7 @@ int ir3_delayslots(struct ir3_instruction *assigner,
                return 6;
        } else if ((consumer->category == 3) &&
                        (is_mad(consumer->opc) || is_madsh(consumer->opc)) &&
-                       (n == 2)) {
+                       (n == 3)) {
                /* special case, 3rd src to cat3 not required on first cycle */
                return 1;
        } else {