cover_list -> cover as per @cliffordwolf
authorEddie Hung <eddie@fpgeh.com>
Sat, 10 Aug 2019 15:26:41 +0000 (08:26 -0700)
committerEddie Hung <eddie@fpgeh.com>
Sat, 10 Aug 2019 15:26:41 +0000 (08:26 -0700)
passes/opt/opt_expr.cc

index 66f360f6e0a8797e6735b671dd1927ad3942428c..c803b5d3d6f2323c0567fd27f513983339e9d3be 100644 (file)
@@ -659,7 +659,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
                                                break;
                                }
                                if (i > 0) {
-                                       cover_list("opt.opt_expr.fine", "$add", "$sub", cell->type.str());
+                                       cover("opt.opt_expr.fine", "$add", "$sub", cell->type.str());
                                        cell->setPort("\\A", sig_a.extract_end(i));
                                        cell->setPort("\\B", sig_b.extract_end(i));
                                        cell->setPort("\\Y", sig_y.extract_end(i));
@@ -704,7 +704,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
                                                break;
                                }
                                if (i > 0) {
-                                       cover_list("opt.opt_expr.fine", "$alu", cell->type.str());
+                                       cover_list("opt.opt_expr.fine.$alu");
                                        cell->setPort("\\A", sig_a.extract_end(i));
                                        cell->setPort("\\B", sig_b.extract_end(i));
                                        cell->setPort("\\X", sig_x.extract_end(i));