2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>

	* s390-dis.c (print_insn_s390): Pick instruction with most
	specific mask.
	* s390-opc.c: Add unused bits to the insn mask.
	* s390-opc.txt: Reorder some instructions to prefer more recent
	versions.

2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gas/s390/esa-g5.d: Adjust serveral instructions.
	* gas/s390/esa-reloc.d: Likewise.
	* gas/s390/esa-z990.d: Likewise.
	* gas/s390/zarch-reloc.d: Likewise.
	* gas/s390/zarch-z10.d: Likewise.
	* gas/s390/zarch-z9-ec.d: Likewise.
	* gas/s390/zarch-z900.d: Likewise.

2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* ld-s390/tlsbin.dd: bcr 0,%r7 -> nopr %r7.
	* ld-s390/tlsbin_64.dd: Likewise.
	* ld-s390/tlspic.dd: Likewise.
	* ld-s390/tlspic_64.dd: Likewise.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 14524c681e9dbe032def43bba301073a366639bd..1fdb02da0ad9d4ebb6c10723efd4b5c25f0b563c 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,13 @@
+2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+       * gas/s390/esa-g5.d: Adjust serveral instructions.
+       * gas/s390/esa-reloc.d: Likewise.
+       * gas/s390/esa-z990.d: Likewise.
+       * gas/s390/zarch-reloc.d: Likewise.
+       * gas/s390/zarch-z10.d: Likewise.
+       * gas/s390/zarch-z9-ec.d: Likewise.
+       * gas/s390/zarch-z900.d: Likewise.
+
 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
 
        * gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment.

diff --git a/gas/testsuite/gas/s390/esa-g5.d b/gas/testsuite/gas/s390/esa-g5.d
index 30cbc0863eabc4418acbbab7636b470227dfab47..0e0984acc57464d33682d3826a136996acaf49d0 100644 (file)
--- a/gas/testsuite/gas/s390/esa-g5.d
+++ b/gas/testsuite/gas/s390/esa-g5.d
@@ -225,10 +225,10 @@ Disassembly of section .text:
 .*:    b3 24 00 69 [    ]*lder %f6,%f9
 .*:    28 69 [  ]*ldr  %f6,%f9
 .*:    b3 45 00 69 [    ]*ldxbr        %f6,%f9
-.*:    25 69 [  ]*lrdr %f6,%f9
+.*:    25 69 [  ]*ldxr %f6,%f9
 .*:    78 65 af ff [    ]*le   %f6,4095\(%r5,%r10\)
 .*:    b3 44 00 69 [    ]*ledbr        %f6,%f9
-.*:    35 69 [  ]*lrer %f6,%f9
+.*:    35 69 [  ]*ledr %f6,%f9
 .*:    38 69 [  ]*ler  %f6,%f9
 .*:    b3 46 00 69 [    ]*lexbr        %f6,%f9
 .*:    b3 66 00 69 [    ]*lexr %f6,%f9
@@ -253,8 +253,8 @@ Disassembly of section .text:
 .*:    b3 60 00 69 [    ]*lpxr %f6,%f9
 .*:    18 69 [  ]*lr   %r6,%r9
 .*:    b1 65 af ff [    ]*lra  %r6,4095\(%r5,%r10\)
-.*:    25 69 [  ]*lrdr %f6,%f9
-.*:    35 69 [  ]*lrer %f6,%f9
+.*:    25 69 [  ]*ldxr %f6,%f9
+.*:    35 69 [  ]*ledr %f6,%f9
 .*:    b3 12 00 69 [    ]*ltdbr        %f6,%f9
 .*:    22 69 [  ]*ltdr %f6,%f9
 .*:    b3 02 00 69 [    ]*ltebr        %f6,%f9
@@ -284,17 +284,17 @@ Disassembly of section .text:
 .*:    6c 65 af ff [    ]*md   %f6,4095\(%r5,%r10\)
 .*:    ed 65 af ff 00 1c [      ]*mdb  %f6,4095\(%r5,%r10\)
 .*:    b3 1c 00 69 [    ]*mdbr %f6,%f9
-.*:    7c 65 af ff [    ]*me   %f6,4095\(%r5,%r10\)
+.*:    7c 65 af ff [    ]*mde  %f6,4095\(%r5,%r10\)
 .*:    ed 65 af ff 00 0c [      ]*mdeb %f6,4095\(%r5,%r10\)
 .*:    b3 0c 00 69 [    ]*mdebr        %f6,%f9
-.*:    3c 69 [  ]*mer  %f6,%f9
+.*:    3c 69 [  ]*mder %f6,%f9
 .*:    2c 69 [  ]*mdr  %f6,%f9
-.*:    7c 65 af ff [    ]*me   %f6,4095\(%r5,%r10\)
+.*:    7c 65 af ff [    ]*mde  %f6,4095\(%r5,%r10\)
 .*:    ed 65 af ff 00 37 [      ]*mee  %f6,4095\(%r5,%r10\)
 .*:    ed 65 af ff 00 17 [      ]*meeb %f6,4095\(%r5,%r10\)
 .*:    b3 17 00 69 [    ]*meebr        %f6,%f9
 .*:    b3 37 00 69 [    ]*meer %f6,%f9
-.*:    3c 69 [  ]*mer  %f6,%f9
+.*:    3c 69 [  ]*mder %f6,%f9
 .*:    4c 65 af ff [    ]*mh   %r6,4095\(%r5,%r10\)
 .*:    a7 6c 80 01 [    ]*mhi  %r6,-32767
 .*:    fc 58 5f ff af ff [      ]*mp   4095\(6,%r5\),4095\(9,%r10\)
@@ -332,8 +332,8 @@ Disassembly of section .text:
 .*:    54 65 af ff [    ]*n    %r6,4095\(%r5,%r10\)
 .*:    d4 ff 5f ff af ff [      ]*nc   4095\(256,%r5\),4095\(%r10\)
 .*:    94 ff 5f ff [    ]*ni   4095\(%r5\),255
-.*:    47 05 af ff [    ]*bc   0,4095\(%r5,%r10\)
-.*:    07 09 [  ]*bcr  0,%r9
+.*:    47 05 af ff [    ]*nop  4095\(%r5,%r10\)
+.*:    07 09 [  ]*nopr %r9
 .*:    14 69 [  ]*nr   %r6,%r9
 .*:    56 65 af ff [    ]*o    %r6,4095\(%r5,%r10\)
 .*:    d6 ff 5f ff af ff [      ]*oc   4095\(256,%r5\),4095\(%r10\)
@@ -450,10 +450,10 @@ Disassembly of section .text:
 .*:    b3 58 00 69 [    ]*thder        %f6,%f9
 .*:    b3 59 00 69 [    ]*thdr %f6,%f9
 .*:    91 ff 5f ff [    ]*tm   4095\(%r5\),255
-.*:    a7 60 ff ff [    ]*tmh  %r6,65535
-.*:    a7 61 ff ff [    ]*tml  %r6,65535
-.*:    a7 60 ff ff [    ]*tmh  %r6,65535
-.*:    a7 61 ff ff [    ]*tml  %r6,65535
+.*:    a7 60 ff ff [    ]*tmlh %r6,65535
+.*:    a7 61 ff ff [    ]*tmll %r6,65535
+.*:    a7 60 ff ff [    ]*tmlh %r6,65535
+.*:    a7 61 ff ff [    ]*tmll %r6,65535
 .*:    eb 50 5f ff 00 c0 [      ]*tp   4095\(6,%r5\)
 .*:    b2 36 5f ff [    ]*tpi  4095\(%r5\)
 .*:    e5 01 5f ff af ff [      ]*tprot        4095\(%r5\),4095\(%r10\)
@@ -462,11 +462,11 @@ Disassembly of section .text:
 .*:    01 ff [  ]*trap2
 .*:    b2 ff 5f ff [    ]*trap4        4095\(%r5\)
 .*:    b2 a5 00 69 [    ]*tre  %r6,%r9
-.*:    b9 93 00 69 [    ]*troo %r6,%r9,0
-.*:    b9 92 00 69 [    ]*trot %r6,%r9,0
+.*:    b9 93 00 69 [    ]*troo %r6,%r9
+.*:    b9 92 00 69 [    ]*trot %r6,%r9
 .*:    dd ff 5f ff af ff [      ]*trt  4095\(256,%r5\),4095\(%r10\)
-.*:    b9 91 00 69 [    ]*trto %r6,%r9,0
-.*:    b9 90 00 69 [    ]*trtt %r6,%r9,0
+.*:    b9 91 00 69 [    ]*trto %r6,%r9
+.*:    b9 90 00 69 [    ]*trtt %r6,%r9
 .*:    93 00 5f ff [    ]*ts   4095\(%r5\)
 .*:    b2 35 5f ff [    ]*tsch 4095\(%r5\)
 .*:    f3 58 5f ff af ff [      ]*unpk 4095\(6,%r5\),4095\(9,%r10\)
@@ -479,4 +479,4 @@ Disassembly of section .text:
 .*:    17 69 [  ]*xr   %r6,%r9
 .*:    b2 76 00 00 [    ]*xsch
 .*:    f8 58 5f ff af ff [      ]*zap  4095\(6,%r5\),4095\(9,%r10\)
-.*:    07 07 [         ]*bcr   0,%r7
+.*:    07 07 [         ]*nopr  %r7

diff --git a/gas/testsuite/gas/s390/esa-reloc.d b/gas/testsuite/gas/s390/esa-reloc.d
index 7b75989ae27835bd1acbc40437a68be8559c1a9d..c9da92870d511096609843b683ef470da614ea58 100644 (file)
--- a/gas/testsuite/gas/s390/esa-reloc.d
+++ b/gas/testsuite/gas/s390/esa-reloc.d
@@ -48,4 +48,4 @@ Disassembly of section .text:
 [      ]*50: R_390_PLT16DBL    foo\+0x2
   52:  00 00 00 00 [   ]*.long 0x00000000
 [      ]*52: R_390_PLT32       foo\+0x4
-  56:  07 07 [         ]*bcr   0,%r7
+  56:  07 07 [         ]*nopr  %r7

diff --git a/gas/testsuite/gas/s390/esa-z990.d b/gas/testsuite/gas/s390/esa-z990.d
index 484c5afb056ab0d977bf52168ca01e8dd5a9e255..8358cdc3c207704cfa5041a2f0973048857139f4 100644 (file)
--- a/gas/testsuite/gas/s390/esa-z990.d
+++ b/gas/testsuite/gas/s390/esa-z990.d
@@ -12,4 +12,4 @@ Disassembly of section .text:
 .*:    b9 3f 00 69 [    ]*klmd %r6,%r9
 .*:    b9 1e 00 69 [    ]*kmac %r6,%r9
 .*:    eb 69 50 00 80 8f [      ]*clclu        %r6,%r9,-524288\(%r5\)
-.*:    07 07 [         ]*bcr   0,%r7
+.*:    07 07 [         ]*nopr  %r7

diff --git a/gas/testsuite/gas/s390/zarch-reloc.d b/gas/testsuite/gas/s390/zarch-reloc.d
index 7660278dd19156e3d7bfef0a8dfd838cbd5070f4..136b3b1a62f7a426e2549f9f0acfb0b74a3f4866 100644 (file)
--- a/gas/testsuite/gas/s390/zarch-reloc.d
+++ b/gas/testsuite/gas/s390/zarch-reloc.d
@@ -29,4 +29,4 @@ Disassembly of section .text:
 [      ]*52: R_390_PLT32DBL    foo\+0x2
 [      ]*...
 [      ]*56: R_390_PLT64       foo\+0x6
-  5e:  07 07 [         ]*bcr   0,%r7
+  5e:  07 07 [         ]*nopr  %r7

diff --git a/gas/testsuite/gas/s390/zarch-z10.d b/gas/testsuite/gas/s390/zarch-z10.d
index 9af2bfce848669b852771b0429ac8ac422d4af91..2ea258d7043e6ef608659708eb420149c419b47c 100644 (file)
--- a/gas/testsuite/gas/s390/zarch-z10.d
+++ b/gas/testsuite/gas/s390/zarch-z10.d
@@ -374,4 +374,4 @@ Disassembly of section .text:
 .*:    b9 bf 00 67 [   ]*trte  %r6,%r7,0
 .*:    b9 bd a0 67 [   ]*trtre %r6,%r7,10
 .*:    b9 bd 00 67 [   ]*trtre %r6,%r7,0
-.*:    07 07 [         ]*bcr   0,%r7
\ No newline at end of file
+.*:    07 07 [         ]*nopr  %r7
\ No newline at end of file

diff --git a/gas/testsuite/gas/s390/zarch-z9-ec.d b/gas/testsuite/gas/s390/zarch-z9-ec.d
index 691d1e2d17c06fecd10f9390600020e5136e9166..9d557c7756af1f1e16cf659964189d3b2d8388b9 100644 (file)
--- a/gas/testsuite/gas/s390/zarch-z9-ec.d
+++ b/gas/testsuite/gas/s390/zarch-z9-ec.d
@@ -73,4 +73,4 @@ Disassembly of section .text:
 .*:    c8 31 10 0a 20 14 [      ]*ectg 10\(%r1\),20\(%r2\),%r3
 .*:    c8 32 10 0a 20 14 [      ]*csst 10\(%r1\),20\(%r2\),%r3
 # Expect 2 bytes of padding.
-.*:    07 07 [  ]*bcr  0,%r7
+.*:    07 07 [  ]*nopr %r7

diff --git a/gas/testsuite/gas/s390/zarch-z900.d b/gas/testsuite/gas/s390/zarch-z900.d
index f33e43c9f971e470b3b3fcf18809ca9f82260b67..2cb352f739a311f51c90c4715494671fc3da1aaa 100644 (file)
--- a/gas/testsuite/gas/s390/zarch-z900.d
+++ b/gas/testsuite/gas/s390/zarch-z900.d
@@ -146,4 +146,4 @@ Disassembly of section .text:
 .*:    eb 96 5f ff 00 0f [     ]*tracg %r9,%r6,4095\(%r5\)
 .*:    e3 95 af ff 00 82 [     ]*xg    %r9,4095\(%r5,%r10\)
 .*:    b9 82 00 96 [   ]*xgr   %r9,%r6
-.*:    07 07 [  ]*bcr  0,%r7
\ No newline at end of file
+.*:    07 07 [  ]*nopr %r7
\ No newline at end of file

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 1e777a05a14533653f9543e09132083f481f93b6..b1c94bebf17ab796d87b13335ca3b4700f76081d 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+       * ld-s390/tlsbin.dd: bcr 0,%r7 -> nopr %r7.
+       * ld-s390/tlsbin_64.dd: Likewise.
+       * ld-s390/tlspic.dd: Likewise.
+       * ld-s390/tlspic_64.dd: Likewise.
+
 2010-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR ld/11812

diff --git a/ld/testsuite/ld-s390/tlsbin.dd b/ld/testsuite/ld-s390/tlsbin.dd
index 6e49b1be7f40812f62a1f3a35b51e75a979f5556..ae92eaa124f206ad2f5b292e9a7168a38ca12c0a 100644 (file)
--- a/ld/testsuite/ld-s390/tlsbin.dd
+++ b/ld/testsuite/ld-s390/tlsbin.dd
@@ -137,14 +137,14 @@ Disassembly of section .text:
 # function epilog
   +[0-9a-f]+:  98 6e f0 78             lm      %r6,%r14,120\(%r15\)
   +[0-9a-f]+:  07 fe                   br      %r14
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
-  +[0-9a-f]+:  07 07                   bcr     0,%r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
+  +[0-9a-f]+:  07 07                   nopr    %r7
 
 0+[0-9a-f]+ <_start>:
 # function prolog

diff --git a/ld/testsuite/ld-s390/tlsbin_64.dd b/ld/testsuite/ld-s390/tlsbin_64.dd
index 664991a941aa14f8433866631a539e1fd8220128..c5c3ba077ab37068c5ecb12761ed3a5246eaeabf 100644 (file)
--- a/ld/testsuite/ld-s390/tlsbin_64.dd
+++ b/ld/testsuite/ld-s390/tlsbin_64.dd
@@ -160,16 +160,16 @@ Disassembly of section .text:
 # function epilog
  +[0-9a-f]+:   eb 6e f0 d0 00 04       lmg     %r6,%r14,208\(%r15\)
  +[0-9a-f]+:   07 fe                   br      %r14
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
 
 0+[0-9a-f]+ <_start>:
 # function prolog
@@ -220,4 +220,4 @@ Disassembly of section .text:
 # function epilog
  +[0-9a-f]+:   eb 6e f0 d0 00 04       lmg     %r6,%r14,208\(%r15\)
  +[0-9a-f]+:   07 fe                   br      %r14
- +[0-9a-f]+:   07 07                   bcr     0,%r7
+ +[0-9a-f]+:   07 07                   nopr    %r7

diff --git a/ld/testsuite/ld-s390/tlspic.dd b/ld/testsuite/ld-s390/tlspic.dd
index 6e9da5d4e179749b083cca8a44f1824128d54319..d5caeaf253dea763da207be0b91ebc99e1fc58c0 100644 (file)
--- a/ld/testsuite/ld-s390/tlspic.dd
+++ b/ld/testsuite/ld-s390/tlspic.dd
@@ -159,31 +159,31 @@ Disassembly of section .text:
 # function prolog
  +[0-9a-f]+:   98 6e f0 78             lm      %r6,%r14,120\(%r15\)
  +[0-9a-f]+:   07 fe                   br      %r14
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7

diff --git a/ld/testsuite/ld-s390/tlspic_64.dd b/ld/testsuite/ld-s390/tlspic_64.dd
index fea16712aa0f6826bcfbd2fb42342a6bc1c014a2..274cd168783b205b850e8be23d005e653eb8c6ee 100644 (file)
--- a/ld/testsuite/ld-s390/tlspic_64.dd
+++ b/ld/testsuite/ld-s390/tlspic_64.dd
@@ -192,11 +192,11 @@ Disassembly of section .text:
 # function epilog
  +[0-9a-f]+:   eb 6e f0 d0 00 04       lmg     %r6,%r14,208\(%r15\)
  +[0-9a-f]+:   07 fe                   br      %r14
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
- +[0-9a-f]+:   07 07                   bcr     0,%r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7
+ +[0-9a-f]+:   07 07                   nopr    %r7

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 76883575fca61f735924fd30e7a1fa57255084b7..8a7b9988916684e49847eb05ecdc77bf7234c9aa 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
+
+       * s390-dis.c (print_insn_s390): Pick instruction with most
+       specific mask.
+       * s390-opc.c: Add unused bits to the insn mask.
+       * s390-opc.txt: Reorder some instructions to prefer more recent
+       versions.
+
 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
 
        * arm_dis.c (print_insn_coprocessor): Apply off-by-alignment

diff --git a/opcodes/s390-dis.c b/opcodes/s390-dis.c
index b9eeb7976b7a6b362eccdc685eadbdd4a10745c4..37ed2e7d8865dfa7724ecaf61df4d9137a6440bc 100644 (file)
--- a/opcodes/s390-dis.c
+++ b/opcodes/s390-dis.c
@@ -166,6 +166,8 @@ print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)
 
   if (status == 0)
     {
+      const struct s390_opcode *op;
+
       /* Find the first match in the opcode table.  */
       opcode_end = s390_opcodes + s390_num_opcodes;
       for (opcode = s390_opcodes + opc_index[(int) buffer[0]];
@@ -178,6 +180,7 @@ print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)
          /* Check architecture.  */
          if (!(opcode->modes & current_arch_mask))
            continue;
+
          /* Check signature of the opcode.  */
          if ((buffer[1] & opcode->mask[1]) != opcode->opcode[1]
              || (buffer[2] & opcode->mask[2]) != opcode->opcode[2]
@@ -186,6 +189,28 @@ print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)
              || (buffer[5] & opcode->mask[5]) != opcode->opcode[5])
            continue;
 
+         /* Advance to an opcode with a more specific mask.  */
+         for (op = opcode + 1; op < opcode_end; op++)
+           {
+             if ((buffer[0] & op->mask[0]) != op->opcode[0])
+               break;
+
+             if ((buffer[1] & op->mask[1]) != op->opcode[1]
+                 || (buffer[2] & op->mask[2]) != op->opcode[2]
+                 || (buffer[3] & op->mask[3]) != op->opcode[3]
+                 || (buffer[4] & op->mask[4]) != op->opcode[4]
+                 || (buffer[5] & op->mask[5]) != op->opcode[5])
+               continue;
+
+             if (((int)opcode->mask[0] + opcode->mask[1] +
+                  opcode->mask[2] + opcode->mask[3] +
+                  opcode->mask[4] + opcode->mask[5]) <
+                 ((int)op->mask[0] + op->mask[1] +
+                  op->mask[2] + op->mask[3] +
+                  op->mask[4] + op->mask[5]))
+               opcode = op;
+           }
+
          /* The instruction is valid.  */
          if (opcode->operands[0] != 0)
            (*info->fprintf_func) (info->stream, "%s\t", opcode->name);

diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
index dd13a9279c37bb8d6581b193dde37c1488d8c8fb..1a6628d95c7718e53b53baa542c68769e25b9037 100644 (file)
--- a/opcodes/s390-opc.c
+++ b/opcodes/s390-opc.c
@@ -398,10 +398,10 @@ const struct s390_operand s390_operands[] =
 #define MASK_RRR_F0FF    { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRS_RRRDU   { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
 #define MASK_RRS_RRRD0   { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
-#define MASK_RSE_RRRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RSE_CCRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RSE_RURD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RSL_R0RD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RSE_RRRD    { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
+#define MASK_RSE_CCRD    { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
+#define MASK_RSE_RURD    { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
+#define MASK_RSL_R0RD    { 0xff, 0x0f, 0x00, 0x00, 0xff, 0xff }
 #define MASK_RSI_RRP     { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RS_AARD     { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RS_CCRD     { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
@@ -412,10 +412,10 @@ const struct s390_operand s390_operands[] =
 #define MASK_RSY_RURD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 #define MASK_RSY_AARD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 #define MASK_RSY_CCRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RXE_FRRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RXE_RRRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RXF_FRRDF   { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
-#define MASK_RXF_RRRDR   { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
+#define MASK_RXE_FRRD    { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
+#define MASK_RXE_RRRD    { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
+#define MASK_RXF_FRRDF   { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
+#define MASK_RXF_RRRDR   { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
 #define MASK_RXY_RRRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 #define MASK_RXY_FRRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }
 #define MASK_RXY_URRD    { 0xff, 0x00, 0x00, 0x00, 0x00, 0xff }

diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index f55622661265c26156607628831db251a0975403..36a2d03be237cd133dfe464b61fdf8d6c82aa0c3 100644 (file)
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -107,10 +107,10 @@ b7 lctl RS_CCRD "load control" g5 esa,zarch
 82 lpsw S_RD "load PSW" g5 esa,zarch
 18 lr RR_RR "load" g5 esa,zarch
 b1 lra RX_RRRD "load real address" g5 esa,zarch
-25 lrdr RR_FF "load rounded (ext. to long)" g5 esa,zarch
-35 lrer RR_FF "load rounded (long to short)" g5 esa,zarch
 25 ldxr RR_FF "load rounded (ext. to long)" g5 esa,zarch
+25 lrdr RR_FF "load rounded (ext. to long)" g5 esa,zarch
 35 ledr RR_FF "load rounded (long to short)" g5 esa,zarch
+35 lrer RR_FF "load rounded (long to short)" g5 esa,zarch
 22 ltdr RR_FF "load and test (long)" g5 esa,zarch
 32 lter RR_FF "load and test (short)" g5 esa,zarch
 12 ltr RR_RR "load and test" g5 esa,zarch
@@ -119,10 +119,10 @@ b24b lura RRE_RR "load using real address" g5 esa,zarch
 af mc SI_URD "monitor call" g5 esa,zarch
 6c md RX_FRRD "multiply (long)" g5 esa,zarch
 2c mdr RR_FF "multiply (long)" g5 esa,zarch
-7c me RX_FRRD "multiply (short to long)" g5 esa,zarch
 7c mde RX_FRRD "multiply (short to long)" g5 esa,zarch
-3c mer RR_FF "multiply (short to long)" g5 esa,zarch
+7c me RX_FRRD "multiply (short to long)" g5 esa,zarch
 3c mder RR_FF "multiply short to long hfp" g5 esa,zarch
+3c mer RR_FF "multiply (short to long)" g5 esa,zarch
 4c mh RX_RRRD "multiply halfword" g5 esa,zarch
 fc mp SS_LLRDRD "multiply decimal" g5 esa,zarch
 1c mr RR_RR "multiply" g5 esa,zarch
@@ -259,7 +259,9 @@ a8 mvcle RS_RRRD "move long extended" g5 esa,zarch
 a70c mhi RI_RI "multiply halfword immediate" g5 esa,zarch
 b252 msr RRE_RR "multiply single" g5 esa,zarch
 71 ms RX_RRRD "multiply single" g5 esa,zarch
+a700 tmlh RI_RU "test under mask low high" g5 esa,zarch
 a700 tmh RI_RU "test under mask high" g5 esa,zarch
+a701 tmll RI_RU "test under mask low low" g5 esa,zarch
 a701 tml RI_RU "test under mask low" g5 esa,zarch
 0700 nopr RR_0R_OPT "no operation" g5 esa,zarch
 0700 b*8r RR_0R "conditional branch" g5 esa,zarch
@@ -366,8 +368,6 @@ b277 rp S_RD "resume program" g5 esa,zarch
 b27d stsi S_RD "store system information" g5 esa,zarch
 01ff trap2 E "trap" g5 esa,zarch
 b2ff trap4 S_RD "trap4" g5 esa,zarch
-a700 tmlh RI_RU "test under mask low high" g5 esa,zarch
-a701 tmll RI_RU "test under mask low low" g5 esa,zarch
 b278 stcke S_RD "store clock extended" g5 esa,zarch
 b2a5 tre RRE_RR "translate extended" g5 esa,zarch
 eb000000008e mvclu RSE_RRRD "move long unicode" g5 esa,zarch