Regression: Fix some bugs in simple-timing-mp-ruby.py.
authorMarc Orr <marc.orr@gmail.com>
Mon, 11 Jun 2012 07:16:43 +0000 (03:16 -0400)
committerMarc Orr <marc.orr@gmail.com>
Mon, 11 Jun 2012 07:16:43 +0000 (03:16 -0400)
tests/configs/simple-timing-mp-ruby.py

index 4447967a7ebe22068b5f64b8c126b6bb74b2dc09..1cab3039286fc314c433527354637e90465c8412 100644 (file)
@@ -77,11 +77,13 @@ Ruby.create_system(options, system)
 assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
 
 for (i, cpu) in enumerate(system.cpu):
+    # create the interrupt controller
+    cpu.createInterruptController()
+
     #
     # Tie the cpu ports to the ruby cpu ports
     #
-    cpu.icache_port = system.ruby._cpu_ruby_ports[i].port
-    cpu.dcache_port = system.ruby._cpu_ruby_ports[i].port
+    cpu.connectAllPorts(system.ruby._cpu_ruby_ports[i])
 
 # -----------------------
 # run simulation