Add write address to abc_scc_break of ECP5 dist RAM

diff --git a/techlibs/ecp5/cells_sim.v b/techlibs/ecp5/cells_sim.v
index 98f91577713ff26438029c05b5a9eaea1c1adfd1..acfb6960e5a84fcb5e07d88dec68f0c3a76e74c8 100644 (file)
--- a/techlibs/ecp5/cells_sim.v
+++ b/techlibs/ecp5/cells_sim.v
@@ -104,7 +104,7 @@ module PFUMX (input ALUT, BLUT, C0, output Z);
 endmodule
 
 // ---------------------------------------
-(* abc_box_id=2, abc_scc_break="DI,WRE" *)
+(* abc_box_id=2, abc_scc_break="DI,WAD,WRE" *)
 module TRELLIS_DPR16X4 (
        input [3:0] DI,
        input [3:0] WAD,