invoke.texi (Blackfin Options): -mcpu accepts bf592.
authorStuart Henderson <shenders@gcc.gnu.org>
Wed, 18 May 2011 16:31:57 +0000 (16:31 +0000)
committerStuart Henderson <shenders@gcc.gnu.org>
Wed, 18 May 2011 16:31:57 +0000 (16:31 +0000)
2011-05-18  Stuart Henderson  <shenders@gcc.gnu.org>

    * doc/invoke.texi (Blackfin Options): -mcpu accepts bf592.
    * config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
    bf592-none.
    * config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
    * config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
    * config/bfin/bfin.c (bfin_cpus): Add bf592.
    * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
    __ADSPBF592__ and __ADSPBF59x__ for     BFIN_CPU_BF592.
    * config/bfin/bfin-opts.h (bfin_cpu_type): Add BFIN_CPU_BF592.
    * config/bfin/elf.h (LIB_SPEC): Add bf592.

From-SVN: r173867

gcc/ChangeLog
gcc/config/bfin/bfin-opts.h
gcc/config/bfin/bfin.c
gcc/config/bfin/bfin.h
gcc/config/bfin/elf.h
gcc/config/bfin/t-bfin-elf
gcc/config/bfin/t-bfin-linux
gcc/config/bfin/t-bfin-uclinux
gcc/doc/invoke.texi

index 4f6d2c3359fd96b6db5f4234bcae69b49e5c249f..36ebe0c4b099d91e1a28ed8afd6d3e10773d8fcb 100644 (file)
@@ -1,3 +1,16 @@
+2011-05-18  Stuart Henderson  <shenders@gcc.gnu.org>
+
+       * doc/invoke.texi (Blackfin Options): -mcpu accepts bf592.
+       * config/bfin/t-bfin-elf (MULTILIB_MATCHES): Select bf532-none for
+       bf592-none.
+       * config/bfin/t-bfin-linux (MULTILIB_MATCHES): Likewise.
+       * config/bfin/t-bfin-uclinux (MULTILIB_MATCHES): Likewise.
+       * config/bfin/bfin.c (bfin_cpus): Add bf592.
+       * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
+       __ADSPBF592__ and __ADSPBF59x__ for     BFIN_CPU_BF592.
+       * config/bfin/bfin-opts.h (bfin_cpu_type): Add BFIN_CPU_BF592.
+       * config/bfin/elf.h (LIB_SPEC): Add bf592.
+
 2011-05-18  Joseph Myers  <joseph@codesourcery.com>
 
        * config/arm/arm-opts.h (enum arm_fp16_format_type, enum
index d0780a6b52c605ab8a13af45bc7467b368b37aa9..329fa1e625cd437fa2b42a0efe7ed17910f01c6a 100644 (file)
@@ -53,7 +53,8 @@ typedef enum bfin_cpu_type
   BFIN_CPU_BF548M,
   BFIN_CPU_BF549,
   BFIN_CPU_BF549M,
-  BFIN_CPU_BF561
+  BFIN_CPU_BF561,
+  BFIN_CPU_BF592
 } bfin_cpu_t;
 
 #endif
index 2d4e33e5cf49dcfc75a5133f80f3234d4693236c..4f371fd928f5b8000add873ee97ed4eb6fedaa4c 100644 (file)
@@ -350,6 +350,11 @@ static const struct bfin_cpu bfin_cpus[] =
    | WA_05000283 | WA_05000257 | WA_05000315 | WA_LOAD_LCREGS
    | WA_05000074},
 
+  {"bf592", BFIN_CPU_BF592, 0x0001,
+   WA_SPECULATIVE_LOADS | WA_05000074},
+  {"bf592", BFIN_CPU_BF592, 0x0000,
+   WA_SPECULATIVE_LOADS | WA_05000074},
+
   {NULL, BFIN_CPU_UNKNOWN, 0, 0}
 };
 
index 0d83ad8212666581d7511734d740923168857629..4f21a1c8a3262c87631de6ff5e022e53aef20f25 100644 (file)
        case BFIN_CPU_BF561:                    \
          builtin_define ("__ADSPBF561__");     \
          break;                                \
+       case BFIN_CPU_BF592:            \
+         builtin_define ("__ADSPBF592__"); \
+         builtin_define ("__ADSPBF59x__"); \
+         break;                \
        }                                       \
                                                \
       if (bfin_si_revision != -1)              \
index 975212faa23992b11770f90281c807e57c6a5ea6..14e209aa4942405ae34ed81d80400fdabe6f0ea5 100644 (file)
@@ -51,6 +51,7 @@ crti%O%s crtbegin%O%s crtlibid%O%s"
                            %{mmulticore:%{mcorea:-T bf561a.ld%s}} \
                            %{mmulticore:%{mcoreb:-T bf561b.ld%s}} \
                            %{mmulticore:%{!mcorea:%{!mcoreb:-T bf561m.ld%s}}}} \
+             %{mcpu=bf592*:-T bf592.ld%s} \
              %{!mcpu=*:%eno processor type specified for linking} \
              %{!mcpu=bf561*:-T bfin-common-sc.ld%s} \
              %{mcpu=bf561*:%{!mmulticore:-T bfin-common-sc.ld%s} \
index da242a08a21b63bee0222cac647a41560969097d..867a71dce77491c6c90a99416e506708da25b13a 100644 (file)
@@ -58,6 +58,7 @@ MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548m-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549m-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf561-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf592-none
 
 MULTILIB_EXCEPTIONS=mleaf-id-shared-library*
 MULTILIB_EXCEPTIONS+=mcpu=bf532-none/mleaf-id-shared-library*
index daa1e059ce4644610023c11f78a093f5cc45724d..65d8f7a97f369f4146a74707f249b1d26ee50253 100644 (file)
@@ -57,6 +57,7 @@ MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548m-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549m-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf561-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf592-none
 
 SHLIB_MAPFILES=$(srcdir)/config/bfin/libgcc-bfin.ver
 
index 0be258f2f1169bdfa49a79c3c79aa463de2f888f..9990c0d4f2b11df05276931d42d0a594588e1cb2 100644 (file)
@@ -58,6 +58,7 @@ MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf548m-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf549m-none
 MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf561-none
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf592-none
 
 MULTILIB_EXCEPTIONS=mleaf-id-shared-library*
 MULTILIB_EXCEPTIONS+=mcpu=bf532-none/mleaf-id-shared-library*
index 6ed289e3b159961ef2b2c16f4fa7154bfc19c46b..46c0a7006b84b04e494f775503b124b1af02da92 100644 (file)
@@ -10414,7 +10414,7 @@ can be one of @samp{bf512}, @samp{bf514}, @samp{bf516}, @samp{bf518},
 @samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539},
 @samp{bf542}, @samp{bf544}, @samp{bf547}, @samp{bf548}, @samp{bf549},
 @samp{bf542m}, @samp{bf544m}, @samp{bf547m}, @samp{bf548m}, @samp{bf549m},
-@samp{bf561}.
+@samp{bf561}, @samp{bf592}.
 The optional @var{sirevision} specifies the silicon revision of the target
 Blackfin processor.  Any workarounds available for the targeted silicon revision
 will be enabled.  If @var{sirevision} is @samp{none}, no workarounds are enabled.