* gas/ppc/power4.s: ..this. Add mtcr and mfcr testcases.
* gas/ppc/test2elf64.d: Rename to..
* gas/ppc/power4.d: ..this. Update.
* gas/ppc/ppc.exp: Update.
+2003-07-04 Alan Modra <amodra@bigpond.net.au>
+
+ * gas/ppc/test2elf64.s: Rename to..
+ * gas/ppc/power4.s: ..this. Add mtcr and mfcr testcases.
+ * gas/ppc/test2elf64.d: Rename to..
+ * gas/ppc/power4.d: ..this. Update.
+ * gas/ppc/ppc.exp: Update.
+
2003-07-02 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
* gas/mips/set-arch.d: Fix GPR names and show raw insns.
--- /dev/null
+#objdump: -drx -Mpower4
+#as: -mpower4
+#name: Power4 instructions
+
+.*: +file format elf64-powerpc
+.*
+architecture: powerpc:common64, flags 0x0+11:
+HAS_RELOC, HAS_SYMS
+start address 0x0+
+
+Sections:
+Idx Name +Size +VMA +LMA +File off +Algn
+ +0 \.text +0+b8 +0+ +0+ +.*
+ +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
+ +1 \.data +0+10 +0+ +0+ +.*
+ +CONTENTS, ALLOC, LOAD, DATA
+ +2 \.bss +0+ +0+ +0+ +.*
+ +ALLOC
+ +3 \.toc +0+30 +0+ +0+ +.*
+ +CONTENTS, ALLOC, LOAD, RELOC, DATA
+SYMBOL TABLE:
+0+ l +d +\.text 0+
+0+ l +d +\.data 0+
+0+ l +d +\.bss 0+
+0+ l +\.data 0+ dsym0
+0+8 l +\.data 0+ dsym1
+0+ l +d +\.toc 0+
+0+8 l +\.data 0+ usym0
+0+10 l +\.data 0+ usym1
+0+ +\*UND\* 0+ esym0
+0+ +\*UND\* 0+ esym1
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+ +0: e0 83 00 00 lq r4,0\(r3\)
+ 2: R_PPC64_ADDR16_LO_DS dsym0
+ +4: e0 83 00 00 lq r4,0\(r3\)
+ 6: R_PPC64_ADDR16_LO_DS dsym1
+ +8: e0 83 00 00 lq r4,0\(r3\)
+ a: R_PPC64_ADDR16_LO_DS usym0
+ +c: e0 83 00 00 lq r4,0\(r3\)
+ e: R_PPC64_ADDR16_LO_DS usym1
+ +10: e0 83 00 00 lq r4,0\(r3\)
+ 12: R_PPC64_ADDR16_LO_DS esym0
+ +14: e0 83 00 00 lq r4,0\(r3\)
+ 16: R_PPC64_ADDR16_LO_DS esym1
+ +18: e0 82 00 00 lq r4,0\(r2\)
+ 1a: R_PPC64_TOC16_DS \.toc
+ +1c: e0 82 00 00 lq r4,0\(r2\)
+ 1e: R_PPC64_TOC16_DS \.toc\+0x8
+ +20: e0 82 00 10 lq r4,16\(r2\)
+ 22: R_PPC64_TOC16_DS \.toc\+0x10
+ +24: e0 82 00 10 lq r4,16\(r2\)
+ 26: R_PPC64_TOC16_DS \.toc\+0x18
+ +28: e0 82 00 20 lq r4,32\(r2\)
+ 2a: R_PPC64_TOC16_DS \.toc\+0x20
+ +2c: e0 82 00 20 lq r4,32\(r2\)
+ 2e: R_PPC64_TOC16_DS \.toc\+0x28
+ +30: e0 c2 00 20 lq r6,32\(r2\)
+ 32: R_PPC64_TOC16_LO_DS \.toc\+0x28
+ +34: e0 80 00 00 lq r4,0\(r0\)
+ 36: R_PPC64_ADDR16_LO_DS \.text
+ +38: e0 c3 00 00 lq r6,0\(r3\)
+ 3a: R_PPC64_GOT16_DS dsym0
+ +3c: e0 c3 00 00 lq r6,0\(r3\)
+ 3e: R_PPC64_GOT16_LO_DS dsym0
+ +40: e0 c3 00 00 lq r6,0\(r3\)
+ 42: R_PPC64_PLT16_LO_DS dsym0
+ +44: e0 c3 00 00 lq r6,0\(r3\)
+ 46: R_PPC64_SECTOFF_DS dsym1
+ +48: e0 c3 00 00 lq r6,0\(r3\)
+ 4a: R_PPC64_SECTOFF_LO_DS dsym1
+ +4c: e0 c4 00 10 lq r6,16\(r4\)
+ +50: f8 c7 00 02 stq r6,0\(r7\)
+ +54: f8 c7 00 12 stq r6,16\(r7\)
+ +58: f8 c7 ff f2 stq r6,-16\(r7\)
+ +5c: f8 c7 80 02 stq r6,-32768\(r7\)
+ +60: f8 c7 7f f2 stq r6,32752\(r7\)
+ +64: 00 00 02 00 attn
+ +68: 7c 6f f1 20 mtcr r3
+ +6c: 7c 6f f1 20 mtcr r3
+ +70: 7c 68 11 20 mtcrf 129,r3
+ +74: 7c 70 11 20 mtcrf 1,r3
+ +78: 7c 70 21 20 mtcrf 2,r3
+ +7c: 7c 70 41 20 mtcrf 4,r3
+ +80: 7c 70 81 20 mtcrf 8,r3
+ +84: 7c 71 01 20 mtcrf 16,r3
+ +88: 7c 72 01 20 mtcrf 32,r3
+ +8c: 7c 74 01 20 mtcrf 64,r3
+ +90: 7c 78 01 20 mtcrf 128,r3
+ +94: 7c 60 00 26 mfcr r3
+ +98: 7c 70 10 26 mfcr r3,1
+ +9c: 7c 70 20 26 mfcr r3,2
+ +a0: 7c 70 40 26 mfcr r3,4
+ +a4: 7c 70 80 26 mfcr r3,8
+ +a8: 7c 71 00 26 mfcr r3,16
+ +ac: 7c 72 00 26 mfcr r3,32
+ +b0: 7c 74 00 26 mfcr r3,64
+ +b4: 7c 78 00 26 mfcr r3,128
--- /dev/null
+ .section ".data"
+dsym0: .llong 0xdeadbeef
+dsym1:
+
+ .section ".toc"
+.L_tsym0:
+ .tc ignored0[TC],dsym0
+.L_tsym1:
+ .tc ignored1[TC],dsym1
+.L_tsym2:
+ .tc ignored2[TC],usym0
+.L_tsym3:
+ .tc ignored3[TC],usym1
+.L_tsym4:
+ .tc ignored4[TC],esym0
+.L_tsym5:
+ .tc ignored5[TC],esym1
+
+ .section ".text"
+ lq 4,dsym0@l(3)
+ lq 4,dsym1@l(3)
+ lq 4,usym0@l(3)
+ lq 4,usym1@l(3)
+ lq 4,esym0@l(3)
+ lq 4,esym1@l(3)
+ lq 4,.L_tsym0@toc(2)
+ lq 4,.L_tsym1@toc(2)
+ lq 4,.L_tsym2@toc(2)
+ lq 4,.L_tsym3@toc(2)
+ lq 4,.L_tsym4@toc(2)
+ lq 4,.L_tsym5@toc(2)
+ lq 6,.L_tsym5@toc@l(2)
+ lq 4,.text@l(0)
+ lq 6,dsym0@got(3)
+ lq 6,dsym0@got@l(3)
+ lq 6,dsym0@plt@l(3)
+ lq 6,dsym1@sectoff(3)
+ lq 6,dsym1@sectoff@l(3)
+ lq 6,usym1-dsym0@l(4)
+ stq 6,0(7)
+ stq 6,16(7)
+ stq 6,-16(7)
+ stq 6,-32768(7)
+ stq 6,32752(7)
+
+ attn
+
+ mtcr 3
+ mtcrf 0xff,3
+ mtcrf 0x81,3
+ mtcrf 0x01,3
+ mtcrf 0x02,3
+ mtcrf 0x04,3
+ mtcrf 0x08,3
+ mtcrf 0x10,3
+ mtcrf 0x20,3
+ mtcrf 0x40,3
+ mtcrf 0x80,3
+ mfcr 3
+# mfcr 3,0xff #Error, invalid mask
+# mfcr 3,0x81 #Error, invalid mask
+ mfcr 3,0x01
+ mfcr 3,0x02
+ mfcr 3,0x04
+ mfcr 3,0x08
+ mfcr 3,0x10
+ mfcr 3,0x20
+ mfcr 3,0x40
+ mfcr 3,0x80
+
+ .section ".data"
+usym0: .llong 0xcafebabe
+usym1:
+
run_dump_test "astest64"
run_dump_test "astest2_64"
run_dump_test "test1elf64"
- run_dump_test "test2elf64"
+ run_dump_test "power4"
} elseif { [istarget powerpc*-*aix*] } then {
run_dump_test "test1xcoff32"
} elseif { [istarget powerpc*-*-*bsd*] \
+++ /dev/null
-#objdump: -Drx -Mpower4
-#as: -mpower4
-#name: PowerPC Test 2, 64 bit elf, power4 instructions
-
-.*: +file format elf64-powerpc
-.*
-architecture: powerpc:common64, flags 0x0+11:
-HAS_RELOC, HAS_SYMS
-start address 0x0+
-
-Sections:
-Idx Name +Size +VMA +LMA +File off +Algn
- +0 \.text +0+68 +0+ +0+ +.*
- +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE
- +1 \.data +0+10 +0+ +0+ +.*
- +CONTENTS, ALLOC, LOAD, DATA
- +2 \.bss +0+ +0+ +0+ +.*
- +ALLOC
- +3 \.toc +0+30 +0+ +0+ +.*
- +CONTENTS, ALLOC, LOAD, RELOC, DATA
-SYMBOL TABLE:
-0+ l +d +\.text 0+
-0+ l +d +\.data 0+
-0+ l +d +\.bss 0+
-0+ l +\.data 0+ dsym0
-0+8 l +\.data 0+ dsym1
-0+ l +d +\.toc 0+
-0+8 l +\.data 0+ usym0
-0+10 l +\.data 0+ usym1
-0+ +\*UND\* 0+ esym0
-0+ +\*UND\* 0+ esym1
-
-
-Disassembly of section \.text:
-
-0+ <\.text>:
- +0: e0 83 00 00 lq r4,0\(r3\)
- 2: R_PPC64_ADDR16_LO_DS dsym0
- +4: e0 83 00 00 lq r4,0\(r3\)
- 6: R_PPC64_ADDR16_LO_DS dsym1
- +8: e0 83 00 00 lq r4,0\(r3\)
- a: R_PPC64_ADDR16_LO_DS usym0
- +c: e0 83 00 00 lq r4,0\(r3\)
- e: R_PPC64_ADDR16_LO_DS usym1
- +10: e0 83 00 00 lq r4,0\(r3\)
- 12: R_PPC64_ADDR16_LO_DS esym0
- +14: e0 83 00 00 lq r4,0\(r3\)
- 16: R_PPC64_ADDR16_LO_DS esym1
- +18: e0 82 00 00 lq r4,0\(r2\)
- 1a: R_PPC64_TOC16_DS \.toc
- +1c: e0 82 00 00 lq r4,0\(r2\)
- 1e: R_PPC64_TOC16_DS \.toc\+0x8
- +20: e0 82 00 10 lq r4,16\(r2\)
- 22: R_PPC64_TOC16_DS \.toc\+0x10
- +24: e0 82 00 10 lq r4,16\(r2\)
- 26: R_PPC64_TOC16_DS \.toc\+0x18
- +28: e0 82 00 20 lq r4,32\(r2\)
- 2a: R_PPC64_TOC16_DS \.toc\+0x20
- +2c: e0 82 00 20 lq r4,32\(r2\)
- 2e: R_PPC64_TOC16_DS \.toc\+0x28
- +30: e0 c2 00 20 lq r6,32\(r2\)
- 32: R_PPC64_TOC16_LO_DS \.toc\+0x28
- +34: e0 80 00 00 lq r4,0\(r0\)
- 36: R_PPC64_ADDR16_LO_DS \.text
- +38: e0 c3 00 00 lq r6,0\(r3\)
- 3a: R_PPC64_GOT16_DS dsym0
- +3c: e0 c3 00 00 lq r6,0\(r3\)
- 3e: R_PPC64_GOT16_LO_DS dsym0
- +40: e0 c3 00 00 lq r6,0\(r3\)
- 42: R_PPC64_PLT16_LO_DS dsym0
- +44: e0 c3 00 00 lq r6,0\(r3\)
- 46: R_PPC64_SECTOFF_DS dsym1
- +48: e0 c3 00 00 lq r6,0\(r3\)
- 4a: R_PPC64_SECTOFF_LO_DS dsym1
- +4c: e0 c4 00 10 lq r6,16\(r4\)
- +50: f8 c7 00 02 stq r6,0\(r7\)
- +54: f8 c7 00 12 stq r6,16\(r7\)
- +58: f8 c7 ff f2 stq r6,-16\(r7\)
- +5c: f8 c7 80 02 stq r6,-32768\(r7\)
- +60: f8 c7 7f f2 stq r6,32752\(r7\)
- +64: 00 00 02 00 attn
-Disassembly of section \.data:
-
-0+ <dsym0>:
- +0: 00 00 00 00 \.long 0x0
- +4: de ad be ef stfdu f21,-16657\(r13\)
-
-0+8 <dsym1>:
- +8: 00 00 00 00 \.long 0x0
- +c: ca fe ba be lfd f23,-17730\(r30\)
-
-Disassembly of section \.toc:
-
-0+ <\.toc>:
- \.\.\.
- 0: R_PPC64_ADDR64 dsym0
- 8: R_PPC64_ADDR64 dsym1
- 10: R_PPC64_ADDR64 usym0
- 18: R_PPC64_ADDR64 usym1
- 20: R_PPC64_ADDR64 esym0
- 28: R_PPC64_ADDR64 esym1
+++ /dev/null
-
- .section ".data"
-dsym0: .llong 0xdeadbeef
-dsym1:
-
-
- .section ".toc"
-.L_tsym0:
- .tc ignored0[TC],dsym0
-.L_tsym1:
- .tc ignored1[TC],dsym1
-.L_tsym2:
- .tc ignored2[TC],usym0
-.L_tsym3:
- .tc ignored3[TC],usym1
-.L_tsym4:
- .tc ignored4[TC],esym0
-.L_tsym5:
- .tc ignored5[TC],esym1
-
-
- .section ".text"
- lq 4,dsym0@l(3)
- lq 4,dsym1@l(3)
- lq 4,usym0@l(3)
- lq 4,usym1@l(3)
- lq 4,esym0@l(3)
- lq 4,esym1@l(3)
- lq 4,.L_tsym0@toc(2)
- lq 4,.L_tsym1@toc(2)
- lq 4,.L_tsym2@toc(2)
- lq 4,.L_tsym3@toc(2)
- lq 4,.L_tsym4@toc(2)
- lq 4,.L_tsym5@toc(2)
- lq 6,.L_tsym5@toc@l(2)
- lq 4,.text@l(0)
- lq 6,dsym0@got(3)
- lq 6,dsym0@got@l(3)
- lq 6,dsym0@plt@l(3)
- lq 6,dsym1@sectoff(3)
- lq 6,dsym1@sectoff@l(3)
- lq 6,usym1-dsym0@l(4)
- stq 6, 0(7)
- stq 6, 16(7)
- stq 6, -16(7)
- stq 6, -32768(7)
- stq 6, 32752(7)
- attn
-
- .section ".data"
-usym0: .llong 0xcafebabe
-usym1:
-
projects / binutils-gdb.git / commitdiff