add new VBLOCK2 format

diff --git a/simple_v_extension/vblock_format.mdwn b/simple_v_extension/vblock_format.mdwn
index 56e76c1aa3b136a06245457ef522a350749cd572..f526cc71af329aa98b0b6b58f6f7a299a11c9755 100644 (file)
--- a/simple_v_extension/vblock_format.mdwn
+++ b/simple_v_extension/vblock_format.mdwn
@@ -142,8 +142,7 @@ The swizzle table format is included here for convenience:
 
 [[!inline raw="yes" pages="simple_v_extension/swizzle_table_format" ]]
 
-It is still under development and will need integration into the
-main VBLOCK format
+Swizzle blocks are only accessible using the "VBLOCK2" format.
 
 # CSRs:
 

diff --git a/simple_v_extension/vblock_format_table.mdwn b/simple_v_extension/vblock_format_table.mdwn
index 25d7f8acadaaeb5825d8813743a5938b08fe32dd..d10a5e63280a8e196f60ff18989b9df6c140cc70 100644 (file)
--- a/simple_v_extension/vblock_format_table.mdwn
+++ b/simple_v_extension/vblock_format_table.mdwn
@@ -11,7 +11,7 @@ of the RISC-V ISA, is as follows:
 | -     | ----- | ----- | ----- | ----  | ---  | ------- |
 | vlset | 16xil | rplen | pplen | pmode | rmode | 1111111 |
 
-The VL/MAXVL/SubVL Block format:
+The VL/MAXVL/SubVL Block format, when 16xil != 0b111, is:
 
 [[!table  data="""
 31:30 | 29:28 | 27:22    | 21 | 20:19   | 18:16    | comment                              |
@@ -23,3 +23,21 @@ The VL/MAXVL/SubVL Block format:
 0b11  | rsvd  | rsvd     |rsvd| rsvd              || reserved, all 0s                     |
 """]]
 
+When 16xil is 0b111, this is the "Extended" Format, using the >= 192-bit
+RISC-V ISA format.  Note that the length is 80+16\*nnnnnn, not 192+
+
+| base+5 ... base+3         | base+1  | base             | no. of bits   |
+| ------ -----------------  |         | ---------------- | ------------- |
+| ..xxxx  xxxxxxxxxxxxxxxx  |         | x111xxxxx1111111 | 80+16\*nnnnnn |
+| {ops}{Pred}{Reg}{VL Block}| VBLOCK2 | VBLOCK Prefix    |               |
+
+VBLOCK2 extends the VBLOCK fields:
+
+| 15:13 | 12:11  | 10:9   | 8:6   | 5:0  |
+| ----- | -----  | ----   | ---   | ---- |
+| rsvd  | rplen2 | pplen2 | swlen | ilen |
+
+* ilen is the instruction length (number of 16-bit blocks)
+* swlen specifies the number of "swizzle" blocks
+* rplen2 extends rplen by 2 bits
+* pplen2 extends pplen by 2 bits