arch-riscv: Add float registers in copyRegs

The origin copyRegs() does not include float registers.
This patch fixes the problem.

Change-Id: If4ad04b1eda6035486197879ff3e04ff32dd87bb
Signed-off-by: Ian Jiang <ianjiang.ict@gmail.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/32934
Reviewed-by: Jason Lowe-Power <power.jg@gmail.com>
Maintainer: Jason Lowe-Power <power.jg@gmail.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/riscv/utility.hh b/src/arch/riscv/utility.hh
index 32eaff644349e1cc34e05db4ce26b0a4754b761a..d4cf221753e93396213225ef253357f38ebd43c1 100644 (file)
--- a/src/arch/riscv/utility.hh
+++ b/src/arch/riscv/utility.hh
@@ -127,6 +127,10 @@ copyRegs(ThreadContext *src, ThreadContext *dest)
     for (int i = 0; i < NumIntRegs; ++i)
         dest->setIntReg(i, src->readIntReg(i));
 
+    // Second loop through the float registers.
+    for (int i = 0; i < NumFloatRegs; ++i)
+        dest->setFloatReg(i, src->readFloatReg(i));
+
     // Lastly copy PC/NPC
     dest->pcState(src->pcState());
 }