Split section into crypto primitives (bigint) and crypto algorithms (chacha20)

diff --git a/crypto_router_asic.mdwn b/crypto_router_asic.mdwn
index c98e3e0da09716b33ad42bd858b8487a44a0d392..db7ab51e75b8040632ae5c300bfe12cf99850eb7 100644 (file)
--- a/crypto_router_asic.mdwn
+++ b/crypto_router_asic.mdwn
@@ -34,9 +34,6 @@ See [Big integer arithmetic (bigint)](/openpower/sv/biginteger) and
 [Bit manipulation (bitmanip)](/openpower/sv/bitmanip) for rationale, instruction
 list and definition in pseudo-code.
 
-Also, a [presentation](https://ftp.libre-soc.org/fosdem_2024/fosdem2024_bigint.pdf)
-on big integer arithmetic on top of SVP64 vectorization.
-
 **2) Implementation and validation of the above instructions on the ISA simulator**
 
 As with all large software projects the implementation is scattered within
@@ -90,18 +87,29 @@ simulator may be run on FPGA or ASIC.
 (But limited budget of 2021-02-051 was insufficient to complete HDL
 implementation)
 
-**5) Documentation and demonstration of the general-purpose instructions that
-happen to also help accelerate cryptographic algorithms**
+**5) Implementation of a few cryptographic primitives that happen to also help
+accelerate cryptographic algorithms**
+
+Cryptographic algorithms routinely use multi-byte quantities. Some big-integer cryptographic primitives were implemented on top of the SVP64 vectorisation of the above scalar instructions:
 
-* [Big integer multiplication](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l29)
-* [Big integer division/modulus](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l131)
-* [Big integer modular exponentiation](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l991)
+* [Big integer multiplication primitive](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l29)
+* [Big integer division/modulus primitive](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l131)
+* [Big integer modular exponentiation primitive](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l991)
+* A [presentation](https://ftp.libre-soc.org/fosdem_2024/fosdem2024_bigint.pdf)
+on big integer arithmetic primitives on top of SVP64 vectorization.
 
-To test the above assembly algorithms in the ISA simulator,
+To test the above primitives in the ISA simulator,
 [install the developer environment](/HDL_workflow/devscripts), go to the
 `~/src/openpower-isa/src/openpower/decoder/isa` directory, and run
 `SILENCELOG=1 python3 test_aaa_caller_svp64_powmod.py` (warning: long running).
 
+Further reading:
+
+* [Bug 1044 - SVP64 implementation of pow(x,y,z)](https://bugs.libre-soc.org/show_bug.cgi?id=1044)
+
+**6) Implementation of a cryptographic algorithm (chacha20) using the new
+instructions and primitives**
+
 One catastrophic mistake made by many cryptographic instruction implementations
 is to create over-specific instructions. "multiply by 2 then subtract 5" for example (the basis of a RISC-V chacha20 "accelerator"!)
 
@@ -119,9 +127,8 @@ This unit test may also be run directly
 Further reading:
 
 * [Bug 773 - High-Level Demos of Cryptographic and Other Relevant Algorithms](https://bugs.libre-soc.org/show_bug.cgi?id=773)
-* [Bug 1044 - SVP64 implementation of pow(x,y,z)](https://bugs.libre-soc.org/show_bug.cgi?id=1044)
 
-**6) Binutils support for assembling the above instructions**
+**7) Binutils support for assembling the above instructions**
 
 Currently, our reference Python assembler needs to be used to translate assembly
 files containing the new instructions. However, many (not all) instructions were
@@ -132,7 +139,7 @@ added to the Binutils assembler (gas) as well. See:
 
 Further reading: [Bug 964 - binutils: support maddedu, divmod2du instructions](https://bugs.libre-soc.org/show_bug.cgi?id=964)
 
-**7) A flexible self-contained HDL platform (ls2) for implementing a System-on-Chip
+**8) A flexible self-contained HDL platform (ls2) for implementing a System-on-Chip
 on an FPGA or ASIC**
 
 The ls2 platform can compile a Microwatt compatible core (the reference libre-soc